Causes Of Memory Unsafety


Memory unsafety is a characteristic of many of today’s systems. The root cause of buffer bounds vulnerabilities such as buffer overflows and over-reads is unsafe programming. Major software vendors consistently report memory unsafety problems. For example, the Chromium open-source browser project has stated that 69% of CVEs (Common Vulnerabilities and Exposures) reported relate to memory... » read more

The Impact Of Channel Hole Profiles On Advanced 3D NAND Structures


In a two-tier 3D NAND structure, the upper and lower channel hole profile can be different, and this combination of different profiles leads to different top-down visible areas. The visible area is the key metric to determine whether the bottom SONO layer can be punched through and ensure that the bit cells connect to the common source line. Performing channel hole profile splits on a silicon w... » read more

Memory And High-Speed Digital Design


As DRAM gets faster, timing constraints, jitter, and signal integrity become harder to control. The real challenge is to understand what can go wrong early in the design process, and that becomes more complex with each new version of memory and higher signal speeds. Stephen Slater, product manager for EDA products at Keysight, talks about how simulation can be applied to these issues, what to t... » read more

Memory Technologies Key To Advancing AI Applications


Memory is an integral component in every computer system, from the smartphones in our pockets to the giant data centers powering the world’s leading-edge AI applications. As AI continues to rise in reach and complexity, the demand for more memory from data center to endpoints is reshaping the industry’s requirements and traditional approaches to memory architectures. According to OpenAI,... » read more

Ferroelectric Memories Answer Call For Non-Volatile Alternatives


As system designers seek to manipulate larger data sets while reducing power consumption, ferroelectric memory may be part of the solution. It offers an intermediate step between the speed of DRAM and the stability of flash memory. Changing the polarization of ferroelectric domains is extremely fast, and the polarization remains stable without power for years, if not decades. FeFETs, one of ... » read more

Sweeping Changes For Leading-Edge Chip Architectures


Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

Research Bits: August 29


Resistive switching with hafnium oxide Researchers from the University of Cambridge, Purdue University, University College London, Los Alamos National Laboratory, and University at Buffalo used hafnium oxide to build a resistive switching memory device that processes data in a similar way as the synapses in the human brain. At the atomic level, hafnium oxide has no structure, with the hafni... » read more

Predicting The Future For Semiconductors


Is it possible to predict the future? Of course not. We all make projections of what happened in the past, where they are now, and the implications for the future. We bias that in various ways and think we are making some astounding revelation, which is highly unlikely to become true. Of course, by luck, some people get it right and they are bestowed with grand accolades and awards. The likelih... » read more

Research Bits: August 22


Photonic memory Researchers from Zhejiang University, Westlake University, and the Chinese Academy of Sciences developed a 5-bit photonic memory capable of fast volatile modulation and proposed a solution for a nonvolatile photonic network supporting rapid training. This was made possible by integrating the low-loss phase-change material (PCM) antimonite (Sb2S3) into a silicon photonic plat... » read more

Power Supply Noise Effects On Jitter In Clock Synchronous Systems With Emphasis On Memory Interfaces


Power Supply Noise Effects on Jitter in Clock Synchronous Systems with Emphasis on LPDDR5X, DDR5 and HBM3 In today's fast-paced digital world, the performance and capacity of high-speed memory has become crucial for a wide range of applications, from personal computing devices to data centers and high-performance computing systems. Designers face challenges in optimizing their designs ... » read more

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