Shortages, Challenges Engulf Packaging Supply Chain


A surge in demand for chips is impacting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, key components, and equipment. Spot shortages in packaging surfaced in late 2020 and have since spread to other sectors. There are now a variety of choke points in the supply chain. Wirebond and flip-chip capacity will remain tight throughout 2021... » read more

WLFO For High-Performance Low-Cost Packaging Of RFMEMS-CMOS


Navigating the trade-offs between performance, size, cost and reliability can be a challenge when considering integrated circuit (IC) packaging and the end-application. The integration of micro-electromechanical systems (MEMS), either monolithic or heterogeneous, introduces yet another level of complexity that has only recently been a major focus of multi-device packaging. Wafer-level fanout (W... » read more

Roaring ’20s For The Chip Industry


2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

The Chip Industry’s Next-Gen Roadmap


Todd Younkin, the new president and chief executive of the Semiconductor Research Corp. (SRC), sat down with Semiconductor Engineering to talk about engineering careers, R&D trends and what’s ahead for chip technologies over the next decade. What follows are excerpts of that conversation. SE: As a U.S.-based chip consortium, what is SRC's charter? Younkin: The Semiconductor Research... » read more

Stronger, Better Bonding In Advanced Packaging


System-in-package integrators are moving toward copper-to-copper direct bonding between die as the bond pitch goes down, making the solder used to connect devices in a heterogenous package less practical. In thermocompression bonding, protruding copper bumps bond to pads on the underlying substrate. In hybrid bonding, copper pads are inlaid in a dielectric, reducing the risk of oxidation. ... » read more

Die-To-Die Stress Becomes A Major Issue


Stress is becoming more critical to identify and plan for at advanced nodes and in advanced packages, where a simple mismatch can impact performance, power, and the reliability of a device throughout its projected lifetime. In the past, the chip, package, and board in a system generally were designed separately and connected through interfaces from the die to the package, and from the packag... » read more

Testing Silicon Photonics In Production


As silicon photonics costs come down, the technology is being worked into new applications, from connectivity to AI. But full commercial production requires testing those photonic circuits before shipping them. Photonics testing is only getting started. Volume production is still not happening, and test equipment and techniques are still being developed. What exists today is a blend of exist... » read more

Top Tech Videos Of 2020


2020 shaped up to be a year of major upheaval, emerging markets and even increased demand in certain sectors. So it's not surprising that videos focusing on AI, balancing power and performance, designing and manufacturing at advanced nodes, advanced packaging, and automotive-related subjects were the most popular. Of the 68 videos published this year, the following were the most viewed in ea... » read more

Testing More To Boost Profits


Not all chips measure up to spec, but as more data becomes available and the cost of these devices continues to rise, there is increasing momentum to salvage and re-purpose chips for other applications and markets. Performance-based binning is as old as color-banded resistors, but the practice is spreading — even for the most advanced nodes and packages. Over the last three decades, engine... » read more

Chiplets And Heterogeneous Packaging Are Changing System Design And Analysis


In the domain of electronic product design, solely relying on process shrink as the primary driver of product innovation and improved system performance is no longer a viable approach. The cost and complexity associated with advanced nodes has everyone looking for alternatives to the traditional monolithic system on chip (SoC). The path most are taking leads to the world of “More than Moore�... » read more

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