Cataloging IP In The Enterprise


Many companies have no way of documenting where IP they license is actually used, which version of that IP is being utilized, and whether that license extends to other projects or even to their customers. Pedro Pires, applications engineer at ClioSoft, looks at how IP currently is cataloged, why it’s been so difficult to do this in the past, and how AI can be used to speed up and simplify thi... » read more

Seven Hardware Advances We Need to Enable The AI Revolution


The potential, positive impact AI will have on society at large is impossible to overestimate. Pervasive AI, however, remains a challenge. Training algorithms can take inordinate amounts of power, time, and computing capacity. Inference will also become more taxing with applications such as medical imaging and robotics. Applied Materials estimates that AI could consume up to 25% of global elect... » read more

Why Comparing Processors Is So Difficult


Every new processor claims to be the fastest, the cheapest, or the most power frugal, but how those claims are measured and the supporting information can range from very useful to irrelevant. The chip industry is struggling far more than in the past to provide informative metrics. Twenty years ago, it was relatively easy to measure processor performance. It was a combination of the rate at ... » read more

Robots Become More Useful In Factories


Most people associate factory automation with large robotic machines, such as those that weld automobile chassis on assembly lines. But as prices drop and technology improves, robots are being deployed for smaller and more varied tasks, and they are getting better at all of them. Inside of factories, robots can significantly improve output, consistency, and reliability. They can work around ... » read more

A Practical Approach To DFT For Large SoCs And AI Architectures, Part II


By Rahul Singhal and Giri Podichetty Part I of this article discusses the design-for-test (DFT) challenges of AI designs and strategies to address them at the die level. This part focuses on the test requirements of AI chips that integrate multiple dies and memories on the same package. Why 2.5D/3D chiplet-based designs for AI SoCs? Many semiconductor companies are adopting chiplet-based d... » read more

Next-Gen Transistors


Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

Machine Learning Showing Up As Silicon IP


New machine-learning (ML) architectures continue to appear. Up to now, each new offering has been implemented in a chip for sale, to be placed alongside host processors, memory, and other chips on an accelerator board. But over time, more of this technology could be sold as IP that can be integrated into a system-on-chip (SoC). That trend is evident at recent conferences, where an increasing... » read more

Preparing For Test Early In The Design Flow


Until very recently, semiconductor design, verification, and test were separate domains. Those domains have since begun to merge, driven by rising demand for reliability, shorter market windows, and increasingly complex chip architectures. In the past, products were designed from a functional perspective, and designers were not concerned about what the physical implementation of the product ... » read more

Data Center Architectures In Flux


Data center architectures are becoming increasingly customized and heterogeneous, shifting from processors made by a single vendor to a mix of processors and accelerators made by multiple vendors — including system companies' own design teams. Hyperscaler data centers have been migrating toward increasingly heterogeneous architectures for the past half decade or so, spurred by the rising c... » read more

Image Processing For Vision AI


Recent years have seen an increasing need for Vision AI applications using AI to enable real-time image recognition. Vision AI, which substitutes AI for human visual recognition, requires optimal image processing. Renesas has released RZ/V2M as mid-class, and RZ/V2L as an entry class, Vision AI microprocessors (MPUs). Both products are equipped with DRP-AI which is Dynamically Reconfigurable Pr... » read more

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