tag: BiST

Automotive Functional Safety Using LBIST and Other Detection Methods
By Cadence - 24 Apr, 2019 - Comments: 0

Functional safety requirements for safety-critical applications are addressed with the insertion of safety mechanisms to detect and/or correct potential failures: their effectiveness is measured by diagnostic coverage (DC). Built-in-self-test, or BIST, originally developed for manufacturing test, can be used as a detection mechanism for functional safety. However, it requires original values to... » read more

Redefining Expectations for Test
By Synopsys - 24 Apr, 2019 - Comments: 0

New and rapidly expanding applications, such as artificial intelligence and automotive, are increasing in design size and complexity. These evolving market segments require unprecedented levels of quality and long-term reliability, which has created a fundamental shift in both the importance and need for integration of advanced semiconductor test. Synopsys unveiled a new family of test products... » read more

How To Manage DFT For AI Chips
By Rahul Singhal - 09 Apr, 2019 - Comments: 0

Semiconductor companies are racing to develop AI-specific chips to meet the rapidly growing compute requirements for artificial intelligence (AI) systems. AI chips from companies like Graphcore and Mythic are ASICs based on the novel, massively parallel architectures that maximize data processing capabilities for AI workloads. Others, like Intel, Nvidia, and AMD, are optimizing existing archite... » read more

IC Test: Doing It At The Right Place At The Right Time
By Rohit Kapur - 14 Mar, 2019 - Comments: 1

In the real world, we are slaves to our environment. The decisions we make are dependent on the resources available at any given time. In school, I remember coming up with a binary decision diagram (BDD) variable-ordering algorithm that relied on partial BDDs. Was that the best algorithm to determine the variable ordering of a BDD for a design? Probably not. However, it was easy to do as a coll... » read more

Unified Compression and LBIST in a Physically Aware Environment
By Cadence - 27 Feb, 2019 - Comments: 0

Unified compression is a new approach that unifies scan compression and logic built-in self-test (LBIST). It leverages recent innovations from Cadence in physically-aware design for test (DFT) to solve routing congestion and area issues from traditional discrete approaches and delivers a confident path to high-quality test. On a sample design, area savings of 35–47%, and scan wirelength savin... » read more

4 Issues In Test
By Ed Sperling - 10 Dec, 2018 - Comments: 0

When most design engineers think about test, they envision a large piece of equipment in the fab they probably will never actually see or interact with. But as chips become more complex—driven by an explosion in both quantity and different types of data—test is emerging as one of the big challenges in design and manufacturing. There are four primary segments for test, each with its own s... » read more

Improving In-System Test With Tessent VersaPoint Test Point Technology
By Mentor, a Siemens Business - 10 Jan, 2018 - Comments: 0

This paper describes a new versatile test point technology called VersaPoint, which has been developed specifically to work with designs implementing mixed EDT/LBIST methodologies to reduce EDT pattern counts and improve Logic BIST (LBIST) test coverage. VersaPoint test points can reduce compressed pattern counts 2X to 4X beyond compression alone and improve LBIST test coverage beyond what is p... » read more

Smarter DFT Infrastructure And Automation Emerge As Keys To Managing DFT Design Scaling
By Ron Press - 21 Dec, 2017 - Comments: 0

By Ron Press and Vidya Neerkundar The reality of DFT for large and complex SoCs has introduced new risk into design schedules. DFT teams end up in the critical path to tape out while waiting for portions of the design to be complete, and there are more DFT integration steps than ever before. The traditional approaches to DFT work on huge designs pose problems of repeatability and reliability... » read more

How To Sleep Easier If You Test Auto ICs For A Living
By Andrew Macleod - 07 Dec, 2017 - Comments: 0

Last month, I looked at the product definition process of automotive ICs, using the $7 billion microcontroller market as an illustration of design exploration to optimize performance, features, die size and product cost. Now I’d like to look at the back end of the process — the final IC testing that’s still critical no matter how sound the upfront work in defining a featuring set and aptl... » read more

The Week In Review: Design
By Jesse Allen - 03 Nov, 2017 - Comments: 0

M&A Synopsys will acquire Black Duck Software, a provider of software for securing and managing open source software. Synopsys already has a stake in this area from its Coverity acquisition in 2014, which it has been using to analyze security practices in open source software. Founded in 2003 and headquartered in Massachusetts, Black Duck's products automate the process of identifying and ... » read more

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