Research Bits: Mar. 3


Computational electron microscopy Researchers from Cornell University, TSMC, and ASM used electron ptychography for atomic-scale defect inspection of transistors. The computational imaging method uses an extremely precise electron microscope pixel array detector (EMPAD) to collect detailed scattering patterns of electrons after they pass through transistors and compare how the patterns chan... » read more

When Cleaning Chips Isn’t Clean Enough


Key Takeaways Contamination is becoming much more difficult to identify at the most advanced nodes, forcing fabs to rethink how control is achieved. Issues may show up as electrical or statistical anomalies, not particles, and not at time zero. Reliable classification is needed to identify critical contamination and reduce time and effort spent on nuisance failures. For much... » read more

How Guardbanding Of Inline Wafer Defects Can Improve Chip Reliability Insurance


Partially defective, marginal die can still be functional enough to pass final electrical test. Some of these “walking wounded” chips get past final testing, but in the customer's end product, under ongoing stress, they may fail. This is a particularly serious issue with automotive, medical and other customers who demand maximum long-term device reliability. The semiconductor industry ha... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS


A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Novel E-Beam Techniques For Inspection And Monitoring


In this paper, we report an advanced e-beam defect inspection tool (eProbe®250) and the Design-for-Inspection™ (DFI) system that has been built and deployed by PDF Solutions down to 4nm FinFET technology nodes. This tool has a very high throughput which allows for in-line inspection of nanometer-level defects in the most advanced technology nodes. We also present eProbe applications for... » read more

Addressing The ABF Substrate Shortage With In-Line Monitoring


Ajinomoto build-up film (ABF) substrate has been a key component in chip manufacturing since its introduction shortly before the turn of the millennium. Substrates made with Ajinomoto build-up film – an electrical insulator designed for complex circuits – are found in PCs, routers, base stations, and servers. Looking ahead, the ABF substrate market will continue to grow, with revenue up ... » read more

Advanced High Throughput e-Beam Inspection With DirectScan


Optical inspection cannot resolve critical defects at advanced nodes and cannot detect subsurface defects. Especially at 7nm and below, many yield and reliability killer defects are the result of interactions between lithography, etch, and fill. These defects often will have part per billion (PPB) level fail rates. Conventional eBeam tools lack the throughput to measure PPB level fail rates. A ... » read more

Big Payback For Combining Different Types Of Fab Data


Collecting and combining diverse data types from different manufacturing processes can play a significant role in improving semiconductor yield, quality, and reliability, but making that happen requires integrating deep domain expertise from various different process steps and sifting through huge volumes of data scattered across a global supply chain. The semiconductor manufacturing IC data... » read more

Finding, Predicting EUV Stochastic Defects


Several vendors are rolling out next-generation inspection systems and software that locates problematic defects in chips caused by processes in extreme ultraviolet (EUV) lithography. Each defect detection technology involves various tradeoffs. But it’s imperative to use one or more of them in the fab. Ultimately, these so-called stochastic-induced defects caused by EUV can impact the perf... » read more

Defect Mitigation And Characterization In Silicon Hardmask Materials


From SPIE Digital Library: In this study, metal contaminants, liquid particle count and on-wafer defects of Si- HMs and filtration removal rates are monitored to determine the effect of filter type, pore size, media morphology, and cleanliness on filtration performance. 5-nm PTFE NTD2 filter having proprietary surface treatment used in this study shows lowest defect count. Authors: Vineet... » read more

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