EUV Annual Perceptions Survey – 2019

By eBeam Initiative - 18 Sep, 2019 - Comments: 0

8th Annual Perceptions Survey – 2019 (July) of 68 luminaries across 42 different companies about use of EUV. Confidence in EUV remains high • 73% predict HVM by end of 2020 • Outlook is positive for actinic inspection and pellicle Click here to see survey slides. » read more

Fast Local Registration Measurements For Efficient E-beam Writer Qualification And Correction

By KLA - 09 Apr, 2019 - Comments: 0

By Klaus-Dieter Roeth, Hendrik Steigerwald, Runyuan Han, Oliver Ache, Frank Laske (KLA-Tencor MIE GmbH, Germany) Abstract Mask data are presented which demonstrate local registration errors that can be correlated to the writing swathes of state-of-the-art e-beam writers and multi-pass strategies, potentially leading to systematic device registration errors versus design of close to 2nm. Fur... » read more

2018 eBeam Initiative Perceptions Survey Results

By eBeam Initiative - 14 Dec, 2018 - Comments: 0

EUV confidence and multi-beam remains high in the 7th Annual Perceptions Survey – 2018 (July). EUV perceptions remain positive. 82% of respondents predict EUV in HVM by end of 2021. Only 1% predict EUV will never happen. Confidence is high again for EUV lithography in high-volume manufacturing and expectations continue to grow around actinic mask inspection for EUV. Perceptions on the nee... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 07 Apr, 2017 - Comments: 0

Mask and fab equipment Seeking to speed up the semiconductor design and manufacturing process, D2S has rolled out its fifth-generation computational design platform (CDP). D2S, a supplier of GPU-accelerated computational systems or platforms, said the latest CDP is designed to enable faster simulations for a range of applications. Using Nvidia’s Pascal-based Tesla P40 GPUs, D2S’ fifth-... » read more

Multi-Patterning Issues At 7nm, 5nm

By Ed Sperling - 28 Nov, 2016 - Comments: 13

Continuing to rely on 193nm immersion lithography with multiple patterning is becoming much more difficult at 7nm and 5nm. With the help of various resolution enhancement techniques, optical lithography using a deep ultraviolet excimer laser has been the workhorse patterning technology in the fab since the early 1980s. It is so closely tied with the continuation of [getkc id="74" comment="Mo... » read more

Manufacturing Bits: April 26

By Mark LaPedus - 26 Apr, 2016 - Comments: 0

Multi-beam inspection For some time, Singaporean startup Maglen has been developing a multi-beam e-beam inspection tool technology. Now, Maglen has reached two milestones. First, it has devised a full column test stand. The test stand includes a mechanical column and software. The second milestone is also significant. “We also dropped our beam and obtained our very first images,” sai... » read more

GPU-Based Computing In Photomask Manufacturing

By Aki Fujimura - 28 Mar, 2016 - Comments: 0

Graphical-processing unit (GPU)-accelerated computing has reached maturity for professional, scientific computing applications. One example of this is the recent GPU-accelerated thermal application for semiconductor photomask manufacturing, which is used in 24/7 manufacturing environments. GPU-accelerated computing won’t be a universal panacea for the semiconductor industry’s “need for sp... » read more

Manufacturing Bits: March 15

By Mark LaPedus - 15 Mar, 2016 - Comments: 0

More multi-beam The multi-beam e-beam market is a hot topic. For example, Intel is quietly in the process of acquiring IMS Nanofabrication, a developer of multi-beam e-beam tools for mask writing applications. Meanwhile, at the recent SPIE Advanced Lithography conference, Mapper Lithography disclosed new upgrades for its multi-beam e-beam tool for use in direct-write lithography application... » read more

Challenges Mount For Patterning And Masks

By Mark LaPedus - 06 Apr, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss [getkc id="80" comment="lithography"] and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief execu... » read more

Manufacturing Bits: March 31

By Mark LaPedus - 31 Mar, 2015 - Comments: 0

Shish kebab nano necklaces Using a directed self-assembly (DSA) process, Georgia Institute of Technology has developed a method to make nanometer-scale, chip-based necklaces. The technique could enable organic-inorganic structures, which resemble a tiny shish kebab or a centipede. The structures are made with various materials, such as semiconductors, magnetics, ferroelectrics and others. ... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?