tag: finFET

Process Variation Analysis Of Device Performance Using Virtual Fabrication — Methodology Demonstrated On A CMOS 14-nm FinFET Vehicle
By Coventor - 18 Aug, 2021 - Comments: 0

A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. The model was subsequently calibrated on Design of Experiment corner case data that had been collected on a limited number of processed fab wafers. W... » read more

Intel/GF deal: Pros, Cons, Unknowns
By Mark LaPedus - 22 Jul, 2021 - Comments: 1

The industry is still buzzing over a Wall Street Journal report that Intel is in talks to acquire GlobalFoundries (GF) for $30 billion. It’s been a week since the report appeared. Intel is still mum. GF says there are no talks taking place. Regardless, it’s worth looking at all of the possible scenarios just in case, and the pros and cons involved. There are layers upon layers of iron... » read more

In-Chip Sensing And PVT Monitoring: Not Just An Insurance Policy
By Ramsay Allen - 11 May, 2021 - Comments: 0

You wouldn’t drive an expensive car without insurance or take a flight in an aircraft without performing instrument and control surface checks. So why would you take the risk of designing a multi-million dollar advanced node semiconductor device without making sure you are aware of, and able to manage, the dynamic conditions that had the potential to make or break a silicon product? Advanced... » read more

Sensors Will Proliferate In SoCs
By Tim Penhale-Jones - 15 Oct, 2020 - Comments: 0

No one likes being put on the spot, and yet we all like a forecast…and as we all know, the only guarantee with a forecast is that it is wrong. Sports commentators have carved out a special niche for themselves with the ‘commentators curse:’ just as they extol the virtues of an individual or a team, the sporting gods prove them wrong in spectacular fashion! Governments are no better: econo... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification
By Greg Curtis - 25 Jun, 2020 - Comments: 0

My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

New Approaches For Dealing With Thermal Problems
By Ann Mutschler - 11 Jun, 2020 - Comments: 0

New thermal monitoring, simulation and analysis techniques are beginning to coalesce in chips developed at leading-edge nodes and in advanced packages in order to keep those devices running at optimal temperatures. This is particularly important in applications such as AI, automotive, data centers and 5G. Heat can kill a chip, but it also can cause more subtle effects such as premature aging... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 13 Mar, 2020 - Comments: 0

Market research The coronavirus is having a major impact on the semiconductor, smartphone and related markets. For example, global fab equipment spending promises to rebound from its 2019 downturn and see a modest recovery this year, according to a report from SEMI. But the coronavirus (COVID-19) outbreak has eroded fab equipment spending in China and elsewhere in 2020, according to the rep... » read more

Manufacturing Bits: Feb. 25
By Mark LaPedus - 25 Feb, 2020 - Comments: 0

Diamond finFETs HRL Laboratories has made new and significant progress to develop diamond finFETs. HRL, a joint R&D venture between Boeing and General Motors, has developed a new ohmic regrowth technique for diamond FETs. This in turn could pave the way towards commercial diamond FETs. Applications include spacecraft, satellites and systems with extreme temperatures. Still in R&D, diamo... » read more

Going On the Edge
By Mark LaPedus - 27 Jan, 2020 - Comments: 3

Emmanuel Sabonnadière, chief executive of Leti, sat down with Semiconductor Engineering to talk about artificial intelligence (AI), edge computing and chip technologies. What follows are excerpts of that conversation. SE: Where is AI going in the future? Sabonnadière: I am a strong believer that edge AI will change our lives. Today’s microelectronics are organized with 80% of things i... » read more

Influence Of SiGe On Parasitic Parameters in PMOS
By Coventor - 27 Sep, 2019 - Comments: 0

In this paper, simulation-based design-technology co-optimization (DTCO) is carried out using the Coventor SEMulator3D virtual fabrication platform with its integrated electrical analysis capabilities [1]. In our study, process modeling is used to predict the sensitivity of FinFET device performance to changes in a silicon germanium epitaxial process. The simulated process is a gate-last flow p... » read more

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