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Aging Analysis Common Model Interface Gains Momentum


By Greg Curtis, Ahmed Ramadan, Ninad Pimparkar, and Jung-Suk Goo In February 2019, Siemens EDA wrote an article1 entitled “The Time Is Now for a Common Model Interface”. Since that time, we have continued to see increasing demand for aging analysis, not only in the traditional automotive space, but also in other areas of technology design, such as mobile communication and IoT application... » read more

Design For Reliability


Circuit aging is emerging as a mandatory design concern across a swath of end markets, particularly in markets where advanced-node chips are expected to last for more than a few years. Some chipmakers view this as a competitive opportunity, but others are unsure we fully understand how those devices will age. Aging is the latest in a long list of issues being pushed further left in the desig... » read more

Using Analytics To Reduce Burn-in


Silicon providers are using adaptive test flows to reduce burn-in costs, one of the many approaches aimed at stemming cost increases at advanced nodes and in advanced packages. No one likes it when their cell phone fails within the first month of ownership. But the problems are much more pressing when the key components in data warehouse servers or automobiles fail. Reliability expectations ... » read more

Dealing With Device Aging At Advanced Nodes


Premature aging of circuits is becoming troublesome at advanced nodes, where it increasingly is complicated by new market demands, more stress from heat, and tighter tolerances due to increased density and thinner dielectrics. In the past, aging and stress largely were separate challenges. Those lines are starting to blur for a number of reasons. Among them: In automotive, advanced-node... » read more

Problems And Solutions In Analog Design


Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

What’s Holding Back Aging Simulation?


Aging simulation supplies information about the long-term behavior before an IC enters into production, providing an important early evaluation of the reliability required by the application and specification. Re-designs due to reliability issues, and over-design with excessive safety margins, are avoided in this way. In addition, the long-term stability can be demonstrated to the customer. ... » read more

Chip Aging Becomes Design Problem


Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

Multiphysics Reliability Signoff For Next-Gen Auto Electronics Systems


The automotive industry is in the midst of a sea change. Growing market needs for electrification, connectivity on the go, advanced driver assistance systems, and ultimately the goal of autonomous driving, are creating newer requirements and greater challenges. A chassis on four wheels is now fitted with cameras, radar and other sensors, which will be the eyes of the driverless car, as well as ... » read more

Transistor Aging Intensifies At 10/7nm And Below


Transistor aging and reliability are becoming much more troublesome for design teams at 10nm and below. Concepts like ‘infant mortality’ and 'bathtub curves' are not new to semiconductor design, but they largely dropped out of sight as methodologies and EDA tools improved. To get past infant mortality, a burn-in process would be done, particularly for memories. And for reliability, which... » read more

Improving Transistor Reliability


One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

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