Extracting Intrinsic Mechanical Properties Of Thin Low-Dielectric Constant Materials With iTF Analysis


This white paper focuses on the optimization and use of Bruker’s iTF software package for the extraction of intrinsic (substrate independent) mechanical properties, particularly for thin, low-k materials. These considerations are split into two main parts: Measurement procedure (Section II) and iTF execution (Section III). The former outlines important aspects of acquiring proper experimental... » read more

Week In Review: Manufacturing, Test


Worldwide fab equipment spending for front-end manufacturing is expected to hit $107 billion this year, an 18% year-over-year increase, according to SEMI’s latest World Fab Forecast report. “Crossing the $100 billion mark in spending on global fab equipment for the first time is a historic milestone for the semiconductor industry,” said Ajit Manocha, president and CEO of SEMI. Investme... » read more

Technical Paper Round-Up: March 22


New memories, materials, and transistor types, and processes for making those devices, highlighted the past week's technical papers. That includes everything from vertical MoS2 to programmable black phosphorus image sensors and photonic lift-off processes for flexible thin-film materials. Papers continue to flow from all parts of the supply chain, with some new studies out of Pakistan, Seoul... » read more

Highly Selective Etch Rolls Out For Next-Gen Chips


Several etch vendors are starting to ship next-generation selective etch tools, paving the way for new memory and logic devices. Applied Materials was the first vendor to ship a next-gen selective etch system, sometimes called highly-selective etch, in 2016. Now, Lam Research, TEL, and others are shipping tools with highly-selective etch capabilities, in preparation for futuristic devices su... » read more

Extending Copper Interconnects To 2nm


Transistor scaling is reaching a tipping point at 3nm, where nanosheet FETs will likely replace finFETs to meet performance, power, area, and cost (PPAC) goals. A significant architectural change is similarly being evaluated for copper interconnects at 2nm, a move that would reconfigure the way power is delivered to transistors. This approach relies on so-called buried power rails (BPRs) and... » read more

GaN ICs Wanted for Power, EV Markets


Circuits built with discrete GaN components may get the job done, but fully integrated GaN circuits remain the ultimate goal because they would offer many of the same advantages as integrated silicon circuits. These benefits include lower cost as the circuit footprint is scaled, and reduced parasitic resistance and capacitance with shorter interconnect runs. In addition, improved device perf... » read more

2D materials for future heterogeneous electronics


Abstract "Graphene and two-dimensional materials (2DM) remain an active field of research in science and engineering over 15 years after the first reports of 2DM. The vast amount of available data and the high performance of device demonstrators leave little doubt about the potential of 2DM for applications in electronics, photonics and sensing. So where are the integrated chips and enabled ... » read more

Survey: 2022 Deep Learning Applications


The 2022 member list of deep learning projects and products that eBeam members are working on in photomask to wafer semiconductor manufacturing. Participating companies include Advantest, ASML, Canon, CEA-LETI, D2S, Fraunhofer IPMS, Hitachi High-Tech Corporation, imec, NuFlare Technology, Siemens Industries Software, Inc.; Siemens EDA, STMicroelectronics, and TASMIT. Click here to see the su... » read more

2D Semiconductors Make Progress, But Slowly


Researchers are looking at a variety of new materials at future nodes, but progress remains slow. In recent years, 2D semiconductors have emerged as a leading potential solution to the problem of channel control in highly scaled transistors. As devices shrink, the channel thickness should shrink proportionally. Otherwise, the gate capacitance won’t be large enough to control the flow of cu... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs UMC plans to build a new fab next to its existing 300mm fab in Singapore. The new fab, called Fab12i P3, will manufacture wafers based on UMC’s 22nm/28nm processes. The planned investment for this project will be $5 billion. The first phase of this greenfield fab will have a monthly capacity of 30,000 wafers with production expected to commence in late 2024. To account fo... » read more

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