Chip Industry’s Technical Paper Roundup: October 24


New technical papers added to Semiconductor Engineering’s library this week. [table id=157 /] More Reading Technical Paper Library home » read more

LLMs For Hardware Design Verification


A technical paper titled “LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation” was published by researchers at University of Cambridge, lowRISC, and Imperial College London. Abstract: "Test stimuli generation has been a crucial but labor-intensive task in hardware design verification. In this paper, we revolutionize this process by harnessing the power of large langua... » read more

Chip Industry Talent Shortage Drives Academic Partnerships


Universities around the world are forming partnerships with semiconductor companies and governments to help fill open and future positions, to keep curricula current and relevant, and to update and expand skills for working engineers. Talent shortages repeatedly have been cited as the number one challenge for the chip industry. Behind those concerns are several key drivers, and many more dom... » read more

Chip Industry Technical Paper Roundup: August 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=128 /] More Reading Technical Paper Library home » read more

Chip Industry’s Technical Paper Roundup: August 9


New technical papers recently added to Semiconductor Engineering’s library: [table id=124 /] More Reading Technical Paper Library home » read more

Modification Of An Existing E-Graph Based RTL Optimization Tool As A Formal Verification Assistant


A technical paper titled “Datapath Verification via Word-Level E-Graph Rewriting” was published by researchers at Intel Corporation and Imperial College London. Abstract: "Formal verification of datapath circuits is challenging as they are subject to intense optimization effort in the design phase. Industrial vendors and design companies deploy equivalence checking against a golden or exi... » read more

Embedded GPU for FPGA, Achieving Over 770 MHz Operating Frequency With Unconstrained Compile


A technical paper titled “eGPU: A 750 MHz Class Soft GPGPU for FPGA” was published by researchers at Intel Corporation and Imperial College London. Abstract: "This paper introduces the eGPU, a SIMT soft processor designed for FPGAs. Soft processors typically achieve modest operating frequencies, a fraction of the headline performance claimed by modern FPGA families, and obtain correspondi... » read more

Chip Industry’s Technical Paper Roundup: August 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=39 /] More Reading Technical Paper Library home » read more

Direct Synthesis of Planar (2D) Micro and Nanopatterned Epitaxial Graphene on SiC


A technical paper titled “Direct synthesis of nanopatterned epitaxial graphene on silicon carbide” was published by researchers at University of Technology Sydney, Ludwig-Maxilimians Universität München, Monash University, and Imperial College London. Abstract: "This article introduces a straightforward approach for the direct synthesis of transfer-free, nanopatterned epitaxial graphene... » read more

Week In Review: Auto, Security, Pervasive Computing


Inflection AI raised $1.3 billion in a new funding round led by Microsoft, Reid Hoffman, Bill Gates, Eric Schmidt, and NVIDIA after raising $225 million in the first round to support the ongoing development of Pi, a “useful, friendly, and fun” AI. In partnership with CoreWeave and NVIDIA, Inflection aims to build the world’s largest AI cluster, comprised of 22,000 NVIDIA H100 Tensor Core ... » read more

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