tag: Lam Research

Overlay Challenges On The Rise
By Mark LaPedus - 16 Nov, 2017 - Comments: 2

The overlay metrology equipment market is heating up at advanced nodes as the number of masking layers grows and the size of the features that need to be aligned continue to shrink. Both ASML and KLA-Tencor recently introduced new [getkc id="307" kc_name="overlay"] metrology systems, seeking to address the increasing precision required for lines, cuts and other features on each layer. At 10/... » read more

Blog Review: Nov. 15
By Jesse Allen - 15 Nov, 2017 - Comments: 0

Cadence's Paul McLellan shares highlights from the Jasper User Group, including what to do when formal is not converging on a proof and formal in use at Arm. Synopsys' Anders Nordstrom explains how formal can verify SoC interconnects and get you from San Jose to Austin. Mentor's Jeff Miller argues that intelligent sensors are the basic building block for the IoT, and the market is growing... » read more

Litho Options For Panel Fan-out
By Mark LaPedus - 06 Nov, 2017 - Comments: 2

Several packaging houses are inching closer to production of panel-level fan-out packaging, a next-generation technology that promises to reduce the cost of today’s fan-out packages. In fact, ASE, Nepes, Samsung and others already have installed the equipment in their panel-level fan-out lines with production slated for 2018 or so. But behind the scenes, panel-level packaging houses contin... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 20 Oct, 2017 - Comments: 0

Market research The IC market remains hot, as several market researchers are raising their forecasts--again. Gartner recently raised its overall IC forecast. Now, IC Insights has raised its IC market growth rate forecast for 2017 to 22%, up six percentage points from the 16% increase shown in its mid-year update. In March, IC Insights raised its worldwide IC market growth forecast for 2017 ... » read more

Exploring New Scaling Approaches
By Mark LaPedus - 19 Oct, 2017 - Comments: 0

At the recent SPIE Photomask Technology + Extreme Ultraviolet Lithography 2017 conference, Semiconductor Engineering sat down to discuss semiconductor technology with Tsu-Jae King Liu, the TSMC Distinguished Professor in Microelectronics in the Department of Electrical Engineering and Computer Sciences at the University of California at Berkeley. More specifically, Liu discussed some of the new... » read more

Searching For EUV Mask Defects
By Mark LaPedus - 19 Oct, 2017 - Comments: 2

Chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm, but several challenges need to be solved before this technology can be used in production. One lingering issue that is becoming more worrisome is how to find [gettech id="31045" comment="EUV"] mask defects. That isn't the only issue, of course. The industry continues to work on the power source and resists. Bu... » read more

MEMS Market Shifting
By Ed Sperling - 19 Oct, 2017 - Comments: 0

The MEMS sector is beginning to look more promising, bolstered by new end-market demand and different packaging options that require more advanced engineering, processes and new materials. All of this points to higher selling prices, which are long overdue in this space. For years, the market for microelectromechanical systems was populated by too many companies vying for too few opportunit... » read more

Controlling Uniformity At The Edge
By Aaron Eppler - 19 Oct, 2017 - Comments: 0

Chipmakers want every part of the wafer to produce, or yield, good die. Advances in process technologies over the years have just about made this a reality, even as feature dimensions continue to shrink and devices grow ever more complex. Now, the last frontier is improving yields at the edge of the wafer – the outer 10 mm or so – where chemical, physical, and even thermal discontinuitie... » read more

Next-Gen Mask Writer Race Begins
By Mark LaPedus - 19 Oct, 2017 - Comments: 5

Competition is heating up in the mask writer equipment business as two vendors—Intel/IMS and NuFlare—vie for position in the new and emerging multi-beam tool segment. Last year, Intel surprised the industry by acquiring IMS Nanofabrication, a multi-beam e-beam mask writer equipment vendor. Also last year, IMS, now part of Intel, began shipping the world’s first multi-beam mask writer f... » read more

Blog Review: Oct. 18
By Jesse Allen - 18 Oct, 2017 - Comments: 0

Mentor's Nitin Bhagwath suggests some ways to deal with undesirable signal integrity effects in DDR designs. Cadence's Ken Willis argues that for multi-gigabit serial link interfaces, signal integrity analysis should start upstream of the traditional post-layout verification step. Synopsys' Ravindra Aneja contends that understanding formal core data can reduce the overall effort and short... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy