Eyes On Zero Defects: Defect Detection And Characterization Metrology


By Darin Collins and Jessica Albright Metrology is the science of measuring, characterizing, and analyzing materials. Within metrology, there are several technologies used to detect material defects on a very small scale – precision on the scale of parts per trillion or less is necessary in the pursuit of zero defects. We broadly define our characterization approach into three main categor... » read more

Full Metrology Solutions For Advanced RF With Picosecond Ultrasonic Metrology


Picosecond Ultrasonics (PULSE Technology) has been widely used in thin metal film metrology because of its unique advantages, such as being a rapid, non-contact, non-destructive technology and its capabilities for simultaneous multiple layer measurement. Measuring velocity and thickness simultaneously for transparent and semi-transparent films offers a lot of potential for not only monitoring ... » read more

Variation Threat In Advanced Nodes, Packages Grows


Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

Manufacturing Bits: Nov. 9


Open-source EUV resist metrology Paul Scherrer Institute (PSI) has developed an open-source software technology for scanning electron microscopy (SEM) applications. The technology is targeted for EUV resist metrology. The technology, called SMILE (SEM-Measured Image Lines Estimator), is an open source software technology, which characterizes line and space patterns in a SEM. SMILE is used t... » read more

Demand Grows For Reducing PCB Defects


Board manufacturers are boosting their investment in inspection, test and analytics to meet the increasingly stringent demands for reliability in safety-critical sectors like automotive. This represents a significant shift from the past, where concerns about reliability primarily targeted the devices connected to printed circuit boards. But as SoCs become disaggregated into advanced packages... » read more

Better Inspection, Higher Yield


Wafers can be inspected for large, obvious defects, or for small, subtle ones. The former is referred to as macro-inspection, while the latter is micro-inspection. These processes use different machines with different capital and operating costs, and they might look like competing approaches with different economic returns. In fact, they are complementary tactics that can be balanced within an ... » read more

Case Study – Socket Metrology


From hours to seconds, the SQ3000 CMM optimized our customer’s backend inspection and socket metrology cutting cost and increasing yields for their high-volume manufacturing.Our customer was leveraging a Coordinate Measurement Machine (CMM) to handle the intricate measurements required for their socket metrology, semiconductor jigs and mobile phone sensors. Click here to continue reading. » read more

Speeding Up The R&D Metrology Process


Several chipmakers are making some major changes in the characterization/metrology lab, adding more fab-like processes in this group to help speed up chip development times. The characterization/metrology lab, which is generally under the radar, is a group that works with the R&D organization and the fab. The characterization lab is involved in the early analytical work for next-generati... » read more

SEMI 3D1 – Terminology For Through Silicon via Geometrical Metrology


Clear and commonly accepted definitions are needed for efficient communication and to prevent misunderstanding between buyers and vendors of metrology equipment and manufacturing services. The purpose of this document is to provide a consistent terminology for the understanding and discussion of metrology issues important to through silicon vias (TSV). Click here to read more, fee for access. » read more

Challenges In Stacking, Shrinking And Inspecting Next-Gen Chips


Rick Gottscho, CTO of Lam Research, sat down with Semiconductor Engineering to discuss memory and equipment scaling, new market demands, and changes in manufacturing being driven by cost, new technologies, and the application of machine learning. What follows are excerpts of that conversation. SE: We have a lot of different memory technologies coming to market. What's the impact of that? ... » read more

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