Making PUFs Even More Secure

By Bryon Moyer - 06 Jan, 2022 - Comments: 0

As security has become a must-have in most systems, hardware roots of trust (HRoTs) have started appearing in many chips. Critical to an HRoT is the ability to authenticate and to create keys – ideally from a reliable source that is unviewable and immutable. “We see hardware roots of trust deployed in two use models — providing a foundation to securely start a system, and enabling a se... » read more

A Novel Complementary Architecture of One-time-programmable Memory and Its Applications as Physical Unclonable Function (PUF) and One-time Password

By Technical Paper Link - 31 Mar, 2021 - Comments: 0

Abstract "For the first time, we proposed a 2T complementary architecture of one-time-programmable memory (OTP) in a foundry logic CMOS chip. It was then used to realize the PUF (Physical unclonable function), and the combination with the AI technology to provide a one-time password capability. At first, an OTP was developed based on a novel 2T CMOS unit cell. The experimental results show t... » read more

Stronger, Better Bonding In Advanced Packaging

By Katherine Derbyshire - 21 Jan, 2021 - Comments: 1

System-in-package integrators are moving toward copper-to-copper direct bonding between die as the bond pitch goes down, making the solder used to connect devices in a heterogenous package less practical. In thermocompression bonding, protruding copper bumps bond to pads on the underlying substrate. In hybrid bonding, copper pads are inlaid in a dielectric, reducing the risk of oxidation. ... » read more

Manufacturing Bits: Nov. 25

By Mark LaPedus - 25 Nov, 2020 - Comments: 0

Lidar-on-a-chip At the upcoming IEEE International Electron Devices Meeting (IEDM), Samsung will present a paper on the industry’s first single-chip lidar beam scanner. (Go to this link and then look for paper 7.2, “Single-Chip Beam Scanner with Integrated Light Source for Real-Time Light Detection and Ranging,” J. Lee et al, Samsung.) Lidar, or light imaging, detection, and ranging, ... » read more

Manufacturing Bits: July 14

By Mark LaPedus - 14 Jul, 2020 - Comments: 0

Complementary FETs At the recent 2020 Symposia on VLSI Technology and Circuits, Imec presented a paper on a 3D complementary field-effect transistor (CFET) made on 300mm wafers. As a demonstration vehicle, Imec showed a CFET based on a 14nm process. Ideally, though, CFETs are next-generation transistors that are targeted for the 1nm node in the future. On the transistor front, chipmaker... » read more

New Trends In Wafer Bonding

By Katherine Derbyshire - 21 Nov, 2019 - Comments: 0

Unable to scale horizontally, due to a combination of lithography delays and power constraints, manufacturers are stacking devices vertically. This has become essential as the proliferation of mobile devices drives demand for smaller circuit footprints, but the transition isn't always straightforward. Three-dimensional integration schemes take many forms, depending on the required interconne... » read more

Manufacturing Bits: June 4

By Mark LaPedus - 04 Jun, 2019 - Comments: 0

Chiplet printer A number of companies, R&D organizations and universities separately presented a slew of papers and technologies at the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas. It’s difficult to write about all of the papers at ECTC. But one paper that stood out is a prototype chiplet micro-assembly printer developed by the Palo Alto Research Cente... » read more

Manufacturing Bits: May 9

By Mark LaPedus - 09 May, 2017 - Comments: 0

China’s quantum computer In its latest achievement, China has built a quantum computer. With its technology, the University of Science and Technology of China and Zhejiang University claimed to have set two records in quantum computing. In classical computing, the information is stored in bits, which can be either a “0” or “1”. In quantum computing, information is stored in quant... » read more

Power/Performance Bits: Aug. 25

By Jesse Allen - 25 Aug, 2015 - Comments: 0

Speeding up quantum computing A team of physicists from the University of Vienna and the Austrian Academy of Sciences demonstrated a new quantum computation scheme in which operations occur without a well-defined order. The researchers used this effect to accomplish a task more efficiently than a standard quantum computer. Moreover, these ideas could set the basis for a new form of quantum c... » read more

The Week In Review: Design/IoT

By Jesse Allen - 26 Jun, 2015 - Comments: 0

IP Sonics released the latest version of the company's flagship NoC, which expands on their interleaved multi-channel technology and includes new layout optimization features for design flows based on modern physical synthesis and place & route tools. Synopsys extended its PCI Express 4.0 IP to support RAS features to help designers ensure data integrity and increase data protection i... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?