New & Faster Single-Crystalline Oxide Thin Films (Max Planck, Cambridge, U of Penn.)


A technical paper titled “Li iontronics in single-crystalline T-Nb2O5 thin films with vertical ionic transport channels” was published by researchers at Max Planck Institute of Microstructure Physics, University of Cambridge, University of Pennsylvania, Gumi Electronics and Information Technology Research Institute, Northwestern University, and ALBA Synchrotron Light Source. Abstract: "Th... » read more

Research Bits: Aug. 7


Stretchy semiconductors Researchers from Pennsylvania State University, University of Houston, Southeast University, and Northwestern University are working towards fully flexible electronics. “Such technology requires stretchy elastic semiconductors, the core material needed to enable integrated circuits that are critical to the technology enabling our computers, phones and so much more,... » read more

Chip Industry’s Technical Paper Roundup: July 12


New technical papers recently added to Semiconductor Engineering’s library: [table id=117 /] (more…) » read more

How Voltage-Controlled MRAM Devices Can Be Used To Create Unique Fingerprints Of Microelectronic Chips


A technical paper titled "Reconfigurable Physically Unclonable Functions Based on Nanoscale Voltage-Controlled Magnetic Tunnel Junctions" was published by researchers at Northwestern University, Western Digital Corporation, Fe Research Inc., and University of Messina. Abstract: "With the fast growth of the number of electronic devices on the internet of things (IoT), hardware-based securi... » read more

Chip Industry’s Technical Paper Roundup: Mar. 21


New technical papers recently added to Semiconductor Engineering’s library: [table id=88 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Reducing The Cost of Cache Coherence By Integrating HW Coherence Protocol Directly With The Programming Language


A new technical paper titled "WARDen: Specializing Cache Coherence for High-Level Parallel Languages" was published by researchers at Northwestern University and Carnegie Mellon University. Abstract: "High-level parallel languages (HLPLs) make it easier to write correct parallel programs. Disciplined memory usage in these languages enables new optimizations for hardware bottlenecks, such ... » read more

Research Bits: March 14


Shift register-in-memory architecture Researchers at the Singapore University of Technology and Design propose a new reconfigurable shift register-in-memory architecture for devices that can work both as a reconfigurable memory component and as a programmable shift register. The device is based on phase-change alloys, which can switch reversibly between the glassy amorphous state and the or... » read more

Research Bits: Jan. 24


Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29


New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

Opportunities and Challenges for Carbon Nanotube Transistors


A new technical review paper titled "Carbon nanotube transistors: Making electronics from molecules" was published by researchers at Duke University, Northwestern University, and Stanford University. “Between the opportunities in high-performance digital logic with the potential for 3D integration and the possibilities for printed and even recyclable thin-film electronics, CNT transistors ... » read more

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