PAM4: Pulse Amplitude Modulation Explained

By Ben Miller - 26 Sep, 2024 - Comments: 0

Pulse amplitude modulation (PAM) is already a widely adopted technology in high-speed digital communications. But to understand why it has become ubiquitous in serial data standards, you first must understand the market forces driving the data networking industry. In this article, I will explore PAM4 in-depth, from its benefits and potential tradeoffs to why it was an essential innovation that ... » read more

Essential Insights for Design PCIe 6.0 Interconnects

By Keysight - 24 Jul, 2024 - Comments: 0

PCI Express (PCIe) is a serial communication protocol that has progressed through generations to enhance data rates and functionality. The latest version, PCIe 6.0, doubles the data rate to 64 GT/s, enabling up to 256 GB/s of bandwidth in an x16 configuration. The technology incorporates PAM4 signaling and forward error correction to maintain high speeds with improved signal integrity and relia... » read more

Leveraging IBIS-AMI Models To Optimize PCIe 6.0 Designs

By Synopsys - 12 Dec, 2023 - Comments: 0

The exploding demand for more data driven by advancements such as artificial intelligence and machine learning has created an increase in bandwidth (BW) for interconnects for different systems and hardware components such as graphic cards, network cards, storge devices, CPUs, memories, and many more. PCIe is the leading high-speed serial communication protocol for connecting such hardware compo... » read more

DSP Techniques For High-Speed SerDes

By Ed Sperling - 23 Oct, 2023 - Comments: 0

Sensors everywhere, more connected devices, and the rollout of smart everything has created a flood of data. The question now is how to best handle all of that data, where to process it, and how to move it locally and to the outside network. Madhumita Sanyal, technical product manager at Synopsys, talks about the need for continuous performance improvements in SerDes, PCIe, NRZ, and PAM4, and w... » read more

Using A Retimer To Extend Reach For PCIe 6.0 Designs

By Lou Ternullo - 10 Aug, 2023 - Comments: 0

One of the biggest changes that came with PCIe 6.0 was the transition from non-return-to-zero (NRZ) signaling to PAM4 signaling. Pulse Amplitude Modulation (PAM) enables more bits to be transmitted at the same time on a serial channel. In PCIe 6.0, this translates to 2 bits per clock cycle for 4 amplitude levels (00, 01, 10, 11) vs. PCIe 5.0, and earlier generations, which used NRZ with 1 bit p... » read more

Evolution Of Equalization Techniques In High-Speed SerDes For Extended Reaches

By Madhumita Sanyal - 20 Jul, 2023 - Comments: 0

The relentless demand for massive amounts of data is accelerating the pace of high-performance computing (HPC) within the high-speed Ethernet realm. This escalation, in turn, intensified the complexity associated with designing networking SoCs, including switches, NICs, retimers, and pluggable modules. Such growth is accelerating the demand for bandwidth hungry applications to transition from 4... » read more

Advanced Modulation And Coding Challenges

By Keysight - 22 Feb, 2023 - Comments: 0

Demands for a connected world with instant data access continue to drive data center transceiver innovation. 100 gigabit Ethernet (GE) data transmission is in production and will continue to evolve. But 100GE speeds aren’t fast enough to support the expected surge in connected devices and the applications they will run, opening the door for 400GE. Non-return-to-zero (NRZ) and four-level pulse... » read more

PCIe 6.0 Takes Data Center Performance To The Next Level

By Lou Ternullo - 12 Jan, 2023 - Comments: 0

Looking back at 2022, we saw a major update to the PCI Express (PCIe) specification. PCIe 6.0 brought with it some of the most fundamental changes yet seen by the specification, resulting in some exciting capabilities that are set to take data center performance to the next level in the years ahead. PCIe has been the interconnect of choice in computing for two decades now. Its ongoing advanc... » read more

Chip Sandwich: Electronics Chip & Photonics Chip Co-Optimized To Work Together (CalTech/Univ. of Southampton)

By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A technical paper titled "A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators" was published by researchers at CalTech and University of Southampton. "The resulting optimized interface between the two chips allows them to transmit 100 gigabits of data per second while producing just 2.4 pico-Joules per transmitted bit. This improves th... » read more

A Sea Change In Signaling With PCIe 6.0

By Tim Messegee - 12 May, 2022 - Comments: 0

PCI Express (PCIe) is one of those standards from the PC world, like Ethernet, that has proliferated far beyond its original application space. Thanks to its utility and economies of scale, PCIe has found a place in applications in IoT, automotive, test and measurement, medical, and more. As it has scaled, PCIe has pushed NRZ signaling to higher and higher levels reaching 32 gigatransfers per s... » read more

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