IC Package Physical Design Best Practices

Historically IC package design has been a relatively simple task which allowed the die bumps to be fanned out on a package substrate to a floorplan geometry suitable for connecting to a printed circuit board (PCB). But today the industry is moving to disaggregation of traditional monolithic SoC functions into chiplets often interfaced with local high-speed memory to avoid silicon reticle limits... » read more

Distribution Of Currents In Via Arrays

It has become increasingly difficult in recent years to provide adequate PDNs on a PCB. The sheer number of different voltages, combined with increased current demands, makes distributing current around the board a substantial layout challenge. This paper demonstrates that by using appropriate and accurate simulations, combined with the improved intuition that such simulations bring, it is a ch... » read more

The Race Toward Mixed-Foundry Chiplets

Creating chiplets with as much flexibility as possible has captured the imagination of the semiconductor ecosystem, but how heterogeneous integration of chiplets from different foundries will play out remains unclear. Many companies in the semiconductor ecosystem are still figuring out how they will fit into this heterogeneous chiplet world and what issues they will need to solve. While near... » read more

12 Ways To Elevate Electronic Design Process Using PADS eBook

When using PADS Professional Premium, designers have access to standard PCB design functionality, such as schematic definition and physical layout, as well previously optional add-on features (now standard) and all of the latest cloud apps, including: Schematic definition: Access to everything you need: Circuit design and simulation, Component selection, library management, and signal integr... » read more

Co-Packaged Optics In The Data Center

Just because faster Ethernet is added to the data center doesn’t mean existing hardware can utilize it efficiently. Scott Durrant, strategic marketing manager at Synopsys, talks with Semiconductor Engineering about the rapid rollout of faster Ethernet rates, problems in moving data to the front module of the switch and how much energy is required, and what optical technology can bring to the ... » read more

Next Steps For Panel-Level Packaging

Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel-level processing. Fraunhofer IZM recently announced a new phase of its panel-level packaging consortium. What follows are excerpts of that discussion. SE: IC packaging isn’t new, but years a... » read more

PCB And IC Technologies Meet In The Middle

Surface-mount technology (SMT) is evolving far beyond its roots as a way of assembling packaged chips onto printed circuit boards without through-holes. It is now moving inside packages that will themselves be mounted on PCBs. But SMT for advanced packages isn’t the same as the SMT we’ve been used to. “Many systems include multiple ASICs, a lot of memory, and that's all integrated i... » read more

PCB Design Rules For Wiring And Crosstalk

Today’s electronic devices market demands miniaturized printed circuit boards (PCBs) with a multitude of high-speed functions integrated on a single board. This causes the designers to have traces routed very close to each other to optimize packaging and space. This proximity may cause unintentional coupling of electromagnetic fields, a phenomenon which we know by the name of crosstalk (see f... » read more

Design For Manufacturing Best Practices

Manufacturing issues are one of the top reasons that we see warranty returns and loss of market share in the electronics industry. Issues like supply chain failures and printed circuit board assembly (PCBA) production challenges related to design can lead to irreparable damage to a brand’s reputation. It is therefore critical that companies have a design for manufacturability (DfM) protocol i... » read more

Blog Review: Feb. 12

Complexity is growing by process node, by end application, and in each design. The latest crop of blogs points to just how many dependencies and uncertainties exist today, and what the entire supply chain is doing about them. Mentor's Shivani Joshi digs into various types of constraints in PCBs. Cadence's Neelabh Singh examines the complexities of verifying a lane adapter state machine in... » read more

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