tag: Politecnico di Torino

Chip Industry’s Technical Paper Roundup: July 18
By Liz Allan - 18 Jul, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=118 /] (more…) » read more

System Level Power Integrity Verification For Multi-Core Microprocessors With FIVR
By Technical Paper Link - 15 Jul, 2023 - Comments: 0

A technical paper titled "A Compressed Multivariate Macromodeling Framework for Fast Transient Verification of System-Level Power Delivery Networks" was published by researchers at Politecnico di Torino and Intel Corporation. Abstract: This paper discusses a reduced-order modeling and simulation approach for fast transient power integrity verification at full system level. The reference str... » read more

Chip Industry’s Technical Paper Roundup: June 13
By Liz Allan - 13 Jun, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=109 /] Further Reading Technical Paper Home » read more

Nanosheet GAAFETs: Compact Modeling (Politecnico di Torino)
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “NS-GAAFET Compact Modeling: Technological Challenges in Sub-3-nm Circuit Performance” was published by researchers at Politecnico di Torino. Abstract: "NanoSheet-Gate-All-Around-FETs (NS-GAAFETs) are commonly recognized as the future technology to push the digital node scaling into the sub-3 nm range. NS-GAAFETs are expected to replace FinFETs in a few years, as ... » read more

Chip Industry’s Technical Paper Roundup: May 16
By Linda Christensen - 16 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=103 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

Recent Developments in Neuromorphic Computing, Focusing on Hardware Design and Reliability
By Technical Paper Link - 08 May, 2023 - Comments: 0

A new technical paper titled "Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies" was published by researchers at Univ. Lyon, Ecole Centrale de Lyon, Univ. Grenoble Alpes, Hewlett Packard Labs, CEA-LETI, and Politecnico di Torino. Abstract "The field of neuromorphic computing has been rapidly evolving in recent years, with an incre... » read more

Chip Industry’s Technical Paper Roundup: Apr. 10
By Linda Christensen - 10 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=92 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Gem5 Simulation Environment With Customized RISC-V Instructions for LIM Architectures
By Technical Paper Link - 09 Apr, 2023 - Comments: 0

A new technical paper titled "Simulation Environment with Customized RISC-V Instructions for Logic-in-Memory Architectures" was published by researchers at National Tsing-Hua University, Politecnico di Torino, University of Rome Tor Vergata, and University of Twente. Abstract "Nowadays, various memory-hungry applications like machine learning algorithms are knocking "the memory wall". Tow... » read more

Flexible In-Field Test of a CAN Controller
By Technical Paper Link - 06 Jan, 2023 - Comments: 0

A technical paper titled "A Systematic Method to Generate Effective STLs for the In-Field Test of CAN Bus Controllers" was published by Delft University of Technology, Cadence, and Politecnico di Torino. Abstract "In order to match the strict reliability requirements mandated by regulations and standards adopted in the automotive sector, as well as other domains where safety is a major conc... » read more

Chip Industry’s Technical Paper Roundup: Oct. 4
By Linda Christensen - 04 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=55 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

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