tag: SerDes

ESD Co-Design For High-Speed SerDeS In FinFET Technologies
By Synopsys - 07 Jun, 2023 - Comments: 0

An electronic device is susceptible to Electrostatic Discharge (ESD) damage during its entire life cycle, including the phase from the completion of the silicon wafer processing to when the device (die) is assembled in the system. To avoid yield loss due to ESD damage during this early phase, on-chip ESD protection measures are applied to provide a certain degree of ESD robustness. The componen... » read more

Design Challenges Of High-Speed Wireline Transmitters
By Samad Parekh - 27 Apr, 2023 - Comments: 0

By Samad Parekh and Noman Hai The need for higher bandwidth networking equipment as well as connectivity in the cloud and hyperscale data centers is driving the switch technology transition from 25T (terabytes) to 50T and soon to 100T. The industry has chosen Ethernet to drive the switch market, using 112G SerDes technology today and next generation architectures being designed to operate at... » read more

Jitter Budgeting For Clock Distribution Networks In High-Speed PHYs And SerDes
By Synopsys - 07 Dec, 2022 - Comments: 0

This paper presents a simple but practically precise estimation of periodic single-tone power supply induced jitter (PSIJ) for MOS clock buffer chains. The estimation is algebraically simple for its analytical closed-form expression requiring only a few circuit simulation results without the pre-knowledge of circuit device SPICE parameters. The expression is well suited to predict period PSIJ, ... » read more

Reducing Schedule Slips With Automated Post-Route Verification Of SerDes High Speed Serial Links
By Todd Westerhoff - 01 Sep, 2022 - Comments: 1

Most high-speed serial links don’t get verified once routing is complete because the process is time consuming and skill-intensive – and SI experts are in short supply. As a result, most serial channels are laid out according to rules, verified through manual inspection, and released to fabrication without thorough analysis. Unverified channels can result in lengthy (and hectic) prototype d... » read more

Compute Express Link (CXL): All You Need To Know
By Rambus - 10 Aug, 2022 - Comments: 0

An in-depth look at Compute Express Link  (CXL) 2.0, an open standard cache-coherent interconnect between processors and accelerators, smart NICs, and memory devices. We explore how CXL is helping data centers more efficiently handle the yottabytes of data generated by artificial intelligence (AI) and machine learning (ML) applications. We discuss how CXL technology maintains memory c... » read more

Co-Packaged Optics In The Data Center
By Ed Sperling - 08 Jun, 2022 - Comments: 0

Just because faster Ethernet is added to the data center doesn’t mean existing hardware can utilize it efficiently. Scott Durrant, strategic marketing manager at Synopsys, talks with Semiconductor Engineering about the rapid rollout of faster Ethernet rates, problems in moving data to the front module of the switch and how much energy is required, and what optical technology can bring to the ... » read more

Meeting 112 SerDes Based System Design Challenges
By Madhumita Sanyal - 12 May, 2022 - Comments: 0

The need for higher bandwidth networking equipment as well as connectivity in the cloud and hyperscale data centers is driving the switch technology transition from 25Tb/s (terabytes) to 51Tb/s and soon to 100Tb/s. The industry has chosen Ethernet to drive the switch market, using 112G SerDes or PHY technology today and 224G SerDes in the future. This article describes how designers can overcom... » read more

High-Performance SerDes Enable The 5G Wireless Edge
By Frank Ferro - 14 Apr, 2022 - Comments: 0

Investment at the core of the global internet is red hot. The number of hyperscale data centers jumped to 700 worldwide at the end of 2021, and with more than 300 in the pipeline, should rise to over 1000 by 20241. In the span of five years, total hyperscale data centers will have doubled. And as the raw number shoots up, more powerful compute and networking hardware is rapidly being deployed, ... » read more

CXL and OMI: Competing or Complementary?
By Bryon Moyer - 23 Mar, 2022 - Comments: 1

System designers are looking at any ideas they can find to increase memory bandwidth and capacity, focusing on everything from improvements in memory to new types of memory. But higher-level architectural changes can help to fulfill both needs, even as memory types are abstracted away from CPUs. Two new protocols are helping to make this possible, CXL and OMI. But there is a looming question... » read more

Why Data Center Power Will Never Come Down
By Bryon Moyer - 10 Feb, 2022 - Comments: 3

Data centers have become significant consumers of energy. In order to deal with the proliferation of data centers and the servers within them, there is a big push to reduce the energy consumption of all data center components. With all that effort, will data center power really come down? The answer is no, despite huge improvements in energy efficiency. “Keeping data center power consum... » read more

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