Shift Left With Calibre To Optimize IC Design Flow Productivity, Design Quality, And Time To Market


Every IC designer strives to create a “clean,” or error-free, cell, block, chiplet, SoC, or 3DIC assembly before passing their work downstream for full sign-off verification. However, waiting until sign-off verification to find out how well you did is probably the least efficient approach to achieving production-ready layouts, impacting engineer productivity, project schedules, and hardware... » read more

Preparing For 5G Millimeter Wave And 6G


Cellular technology is about to take a giant leap forward, but the packaging, assembly, and testing of the chips used in 5G millimeter wave and the forthcoming 6G ecosystem will be significantly more complicated than anything used in the past. So far, most 5G devices are still working at sub-6 GHz frequencies. A massive rollout of mmWave technology over the next few years will significantly ... » read more

193i Lithography Takes Center Stage…Again


Cutting-edge lithography to create smaller features increasingly is being supplemented by improvements in lithography for mature process nodes, both of which are required as SoCs and complex chips are decomposed and integrated into advanced packages. Until the 7nm era, the primary goal of leading-edge chipmakers was to pack everything onto a single system-on-chip (SoC) using the same process... » read more

Blog Review: June 14


Synopsys' Richard Solomon and Gary Ruggles examine the Compute Express Link (CXL) protocol and how it could unlock new ways of doing computing such as enabling efficient heterogeneous computing architectures, accelerating data-intensive workloads, and facilitating advanced real-time analytics. Cadence's Andre Baguenie explains how to convert an electrical signal to a logic value using the Ve... » read more

Auto Industry Relationships Re-Form, But Differently


The automotive industry is in the midst of rapid change on many fronts. OEMs are exploring new functions and features to add to their vehicles, including chiplets, electrification, autonomous features, as well as new vehicle architectures that will determine how vehicles are going to be designed from the foundation up. But all of this is dependent on the relationships between all of the ecosyst... » read more

Power/Performance Costs Of Securing Systems


For much of the chip industry, concerns about security are relatively new, but the requirement for protecting semiconductor devices is becoming pervasive. Unfortunately for many industries, that lesson has been learned the hard way. Security breaches have led to the loss of sensitive data, ransomware attacks that lock up data, theft of intellectual property or financial resources, and loss o... » read more

EDA’s Role Grows For Preventing And Identifying Failures


The front end of design is becoming more tightly integrated with the back end of manufacturing, driven by the rising cost and impact of failures in advanced chips and critical applications. Ironically, the starting point for this shift is failure analysis (FA), which typically happens when a device fails to yield, or worse, when it is returned due to some problem. In production, that leads t... » read more

How To Answer Five Common Questions About Power Module Current Density


Power module current density is an important factor in determining the efficiency and performance of power modules. This article answers five common questions about power module current density so you can make informed decisions when designing a power module for your application. 1. How many wire bonds are required? Generally, a higher current density requires an increased number of w... » read more

Power Modules: A Four-Dimensional Design Challenge Calls For A Holistic Design And Verification Approach


A power module is a high-power switching circuit used in applications for electric vehicles, renewable energy, photovoltaics, wind power, and much more. Switching-element IGBTs and MOSFETs are used in these modules. This paper discusses different technologies and the associated design challenges to achieve complex power module requirements like high voltage resistivity up to 1700 V, high curren... » read more

Blog Review: June 7


Synopsys' Kenneth Larsen and Powerchip's S.Z. Chang explore wafer-on-wafer (WoW) and chip-on-wafer (CoW), 3D hybrid bonding schemes that can be used to stack memory on logic with shorter signal transmission distance at no wasted power and more interconnect and bandwidth density. In a podcast, Siemens' Conor Peick, Nand Kochhar, and Mark Sampson chat about how companies can address growing co... » read more

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