Blog Review: April 13

By Jesse Allen - 13 Apr, 2022 - Comments: 0

Synopsys' Scott Durrant, Priyank Shukla, Mitch Heins, and Jigesh Patel provide a brief overview of the history of copper and optical interconnects used in data centers, the limitations of existing interconnect solutions, and the future of co-packaged optics. Siemens' Trey Reeser finds that it's not only necessary for semiconductor companies to address the safety and security of products for ... » read more

Automation Of Shared Bus Memory Test With Tessent MemoryBIST

By Siemens EDA - 12 Apr, 2022 - Comments: 0

New requirements in automotive, artificial intelligence (AI), and processor applications have resulted in increased use of memory-heavy IP. Memory-heavy IPs for these applications are optimized for high performance, and they will often have a single access point for testing the memories. Tessent MemoryBIST provides an out-of-the-box solution for using this single access point, or shared bus int... » read more

Finding And Applying Domain Expertise In IC Analytics

By Anne Meixner - 12 Apr, 2022 - Comments: 0

Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

New Challenges For Connected Vehicles

By John Koon - 11 Apr, 2022 - Comments: 0

Connected vehicles are all about convenience and safety. Modern vehicles are connected to the Internet via wireless networks, consumer apps, and infotainment systems, and there is work underway to connect them over 5G to guided driving. But there also are challenges to making all of this work securely, safely, and as expected throughout the expected lifetimes of chips and systems. The goal i... » read more

Battery Management Getting Competitive For EVs

By Ed Sperling - 07 Apr, 2022 - Comments: 0

The success or failure of future electric vehicles will depend on where and how those cars are used, as well as significant advances in battery materials, energy density, and some very complex battery management systems. Battery power needs to be balanced, stored for extended times, and delivered to wherever it is needed most in real time. This is a huge challenge, and nearly everything in a... » read more

Verification Management For Aerospace And Defense

By Siemens EDA - 07 Apr, 2022 - Comments: 0

This executive brief presents the verification management digital thread. It demonstrates the value of integrated verification and certification for accelerating product delivery in the aerospace and defense industry. Read the brief to learn how you can certify products on schedule and within budget, eliminating the silos in your verification and certification activities. Aircraft certificat... » read more

EDA On Cloud Presents Unique Challenges

By Ann Mutschler - 31 Mar, 2022 - Comments: 0

Discussions about cloud-based EDA tools are heating up for both hardware and software engineering projects, opening the door to vast compute resources that can be scaled up and down as needed. Still, not everyone is on board with this shift, and even companies that use the cloud don't necessarily want to use it for every aspect of chip design. But the number of cloud-based EDA tools is growi... » read more

Clocks Getting Skewed Up

By Brian Bailey - 30 Mar, 2022 - Comments: 0

At a logical level, synchronous designs are very simple and the clock just happens. But the clocking network is possibly the most complex in a chip, and it's fraught with the most problems at the physical level. To some, the clock is the AC power supply of the chip. To others, it is an analog network almost beyond analysis. Ironically, there are no languages to describe clocking, few tools t... » read more

Improving Memory Efficiency And Performance

By Bryon Moyer - 28 Mar, 2022 - Comments: 0

This is the second of two parts on CXL vs. OMI. Part one can be found here. Memory pooling and sharing are gaining traction as ways of optimizing existing resources to handle increasing data volumes. Using these approaches, memory can be accessed by a number of different machines or processing elements on an as-needed basis. Two protocols, CXL and OMI, are being leveraged to simplify thes... » read more

Incremental Design Breakdown

By Brian Bailey - 24 Mar, 2022 - Comments: 0

For the past two decades, most designs have been incremental in nature. They heavily leveraged IP used in previous designs, and that IP often was developed by third parties. But there are growing problems with that methodology, especially at advanced nodes where back-end issues and the impact of 'shift left' are reducing the savings from reuse. The value of IP reuse has been well established... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?