The Growing Confidence Gap In Verification


By Ed Sperling It’s no surprise that verification is getting more difficult at each new process node. What’s less obvious is just how deep into organizations the job of verifying SoCs and ASICs now extends. Functional verification used to be a well-defined job at the back end of the design flow. It has evolved into a multi-dimensional, multi-group challenge, beginning at the earliest st... » read more

Calculating Emulation’s Complex Cost Of Ownership


By Ann Steffora Mutschler Hardware emulation or hardware-assisted verification –whichever term you choose—has been around for decades. But until recently it has seen only modest adoption due to the high cost, long set-up time, power and IT requirements, among other things. But with simulation running out of steam between 50 and 100 million gates, this specialized hardware makes a ... » read more

Making Important Choices


By Nithya Ruff Last year, my daughter was a senior in high school, very busy finalizing her college selections and completing college applications. For anyone who has gone through this recently, it is not a trivial task to select a place where you will spend the next four years, a place that will shape your future and where you will be spending a good amount of your parent’s money. This expe... » read more

Design Solutions For 20nm And Beyond


The consumer’s insatiable demand for greater performance, a shrinking form factor and extended battery life, all while continuing the trend for lower end user cost is the driving force behind the semiconductor industry’s rapid evolution to ever smaller process geometries. As with many of the previous process geometry shrinks, there will be the usual concerns about the increase in design ... » read more

Experts At The Table: The Business Of IP


Low-Power/High-Performance Engineering sat down to discuss IP supply chain issues with Jim Hogan, an independent VC; Jack Brown, senior vice president at Sonics; Mike Gianfagna, vice president of marketing at Atrenta; Paul Hollingworth, vice president of strategic accounts at eSilicon, and Warren Savage, CEO of IPextreme. What follows are excerpts of that conversation. LPHP: There’s so muc... » read more

Experts At The Table: The Sky Isn’t Falling


By Ann Steffora Mutschler SemiMD sat down recently to discuss how the industry is making 3D ICs a reality today with Sylvan Kaiser, chief technology officer at Docea Power; Steve Smith, senior director for 3D-IC strategy at Synopsys; and Dr. Ahmed Jerraya, director of strategic design programs at CEA-LETI. For part one of this series, click here. SemiMD: Because CEA-LETI has direct expe... » read more

Transitioning States


By Ann Steffora Mutschler While the concept of finite state machines is mature, understanding their role in design, the transitions between them and how to verify them are fundamental to managing power in today’s large SoCs. In essence, a finite state machine is a set of inputs and outputs and gate bits that describes the operation of the system. “Transitions happen from one state to... » read more

The Increasing Challenge Of Reducing Latency


By Ed Sperling When the first mainframe computers were introduced the big challenge was to improve performance by decreasing the latency between spinning reels of tape and the processor—while also increasing the speed at which the processor could crunch ones and zeroes. Fast forward more than six decades and the two issues are now blurred and often confused. Latency is still a drag on per... » read more

iPhone 5 – Verizon has a hit!


By Cary Chin My iPhone 5 was delivered to my door as promised on Sept. 21. The UPS guy had a truck full of them, and seemed quite happy to be getting so much attention as he was making his rounds. As with every other iPhone, I carefully unboxed it with some anticipation, but somehow I felt like there was less excitement this time around. After 5 years of iPhone mania, was the luster starti... » read more

Experts at the Table: Black Belt Power Management


By Ann Steffora Mutschler Low-Power/High-Performance Engineering sat down to discuss rising integration challenges caused by an increasing amount of black-box IP with Qi Wang, technical marketing group director, solutions marketing, for the low-power and mixed-signal group at Cadence; J. Bhasker, architect at eSilicon Corp.; Navraj Nandra, senior director of product marketing for analog an... » read more

← Older posts Newer posts →