Golden Signoff ECO For Last-Mile Electronic Design Closure


Electronic design developers really hate iterative, resource-intensive tasks that occur late in the project schedule. Most engineers are under tremendous time to market (TTM) pressure due to competition while being told that they must minimize the cost of both the project and the end chip. In addition, they are struggling to meet power, performance, and area (PPA) requirements far more aggressi... » read more

Week In Review: Manufacturing, Test


Highlights from ITC The hot topic at this week’s International Test Conference (ITC) was tackling silent data corruption, with panel discussions, papers, and Google’s Parthasarathy Ranganathan’s keynote address all emphasizing the urgency of the issue. In the past two years Meta, Google, and Microsoft have reported on silent errors, errors not detected at test, which are adversely impact... » read more

Week In Review: Design, Low Power


Tools and IP Renesas introduced a new microprocessor that enables artificial intelligence to process image data from multiple cameras. "One of the challenges for embedded systems developers who want to implement machine learning is to keep up with the latest AI models that are constantly evolving,” said Shigeki Kato, Vice President of Renesas' Enterprise Infrastructure Business Division. �... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Renesas announced its integrated development environment (IDE), which car companies can use to develop automotive software for electronic control units (ECUs) with multiple devices, but for which the hardware has not been specified yet. The IDE has co-simulation, debug and trace, high-speed simulation and distributed processing software over multiple SoCs and MCUs. The first develop... » read more

Blog Review: Sept. 28


Cadence's Paul McLellan shares more highlights from the recent Hot Chips, including some very large chips and accelerators for AI and deep learning, new networks and switches, and mobile and edge processors. Synopsys' Marc Serughetti considers the different use cases for digital twins in automotive and how they can help determine the impact of software on verification, test, and validation a... » read more

Toward Domain-Specific EDA


More companies appear to be creating custom EDA tools, but it is not clear if this trend is accelerating and what it means for the mainstream EDA industry. Whenever there is change, there is opportunity. Change can come from new abstractions, new options for optimization, or new limitations that are imposed on a tool or flow. For example, the slowing of Moore's Law means that sufficient prog... » read more

Week In Review: Manufacturing, Test


On Sunday, a 6.8-magnitude earthquake struck the southeast region of Taiwan, causing devastation. TSMC officials reported “no known significant impact for now.” Market research firm TrendForce arrived at a similar conclusion based on its analysis of individual fabs. The Biden administration announced appointment of the leadership team charged with implementing the US CHIPS and Science Ac... » read more

Strengthening The Global Semi Supply Chain


Within the semiconductor ecosystem, there are a number of dynamics pointing to the need for new ways of partnering in more meaningful ways that bring resiliency to the global semiconductor supply chain. One of these is the move to bespoke silicon, stemming from a shift in the companies that create most SoCs today -- the hyperscalar cloud providers. These market leaders know their workloads so w... » read more

The Data Center Journey, From Central Utility To Center Of The Universe


High-performance computing (HPC) has taken on many meanings over the years. The primary goal of HPC is to provide the needed computational power to run a data center – a utilitarian facility dedicated to storing, processing, and distributing data. The beginning of HPC Historically, the data being processed was the output of business operations for a given organization. Transactions, custome... » read more

How Memory Design Optimizes System Performance


Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on the memory side. While the underlying technology still looks very familiar, the real shift is in the way those memories are connected to processing elements and various components within a syste... » read more

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