tag: verification

SoC Verification Made Easy With Aldec HES-DVM
By Aldec - 23 Sep, 2015 - Comments: 0

As designs grow larger, the time spent verifying a project is growing longer as well. As a solution, some companies are trying to ‘shift-left’ their schedules. Verification via software simulators is not fast enough for large System-on-Chip (SoC) design projects, therefore one option is to use an FPGA emulator to speed up the design process. But what happens when a bug occurs? This document... » read more

Power Estimation: Early Warning System Or False Alarm?
By Brian Bailey - 10 Sep, 2015 - Comments: 0

Semiconductor Engineering sat down with a large panel of experts to discuss the state of power estimation and to find out if the current levels of accuracy are sufficient to being able to make informed decisions. Panelists included: Leah Schuth, director of technical marketing in the physical design group at [getentity id="22186" comment="ARM"]; Vic Kulkarni, senior vice president and general m... » read more

Tech Talk: Power Emulation
By Ed Sperling - 10 Sep, 2015 - Comments: 0

Jean-Marie Brunet, marketing director for Mentor Graphics' Emulation Division, talks about why hardware-assisted verification is now required for power and where it works best. [youtube vid=Mb63cbjbZ_I] » read more

Can Cars Be Hack-Proof?
By Ann Mutschler - 03 Sep, 2015 - Comments: 0

Not many days go by when there isn't a news headline describing the latest hacking attempt — or success — of an automobile or automotive system. Malicious hacking has been around almost since the dawn of connected electronics, but it's happening with increasing sophistication in the automotive sector. Even high-end vehicles suffer security flaws that are too costly or not worthwhile to f... » read more

Embedded Vision Becoming Ubiquitous
By Brian Bailey - 27 Aug, 2015 - Comments: 0

Embedded vision is becoming a topic of heated conversation thanks to the emergence of neural networks and their ability to make computer systems learn by example. Neural networks are a very different kind of processing element compared to the other kind of processors we have in the IP arsenal today in that they are not programmed in the same manner. They do not have a stream of instructions... » read more

Blog Review: Aug. 26
By Jesse Allen - 26 Aug, 2015 - Comments: 0

Synopsys' Marc Greenberg attended IDF and learned more about the newly announced Intel/Micron 3D XPoint memory technology named Optane including initial ship dates and some implementation details. In concluding his analysis of the 2014 Functional Verification Study, Mentor's Harry Foster reveals an unexpected finding about design size and respins. How do you keep your power grid from bein... » read more

Delivering Functional Verification Engagements
By Synopsys - 26 Aug, 2015 - Comments: 0

With the advent of smarter and higher performing devices, there has been a tremendous increase in design complexity. Driven by new high-end hardware feature and intelligent software requirements, these devices are comprised of multi-core processors and a multitude of interface IP, memory and other analog circuitry, communicating via many different interface protocols. This poses a huge challeng... » read more

Poised For Aspect-Oriented Design?
By Brian Bailey - 13 Aug, 2015 - Comments: 8

In 1992, [getperson id=" 11046 " comment="Yoav Hollander"] had the idea to take a software programming discipline called aspect-oriented programming (AOP) and apply it to the verification of hardware. Those concepts were incorporated into the [gettech id="31021" t_name="e"] language and [getentity id="22068" e_name="Verisity"] was formed to commercialize it. Hollander had seen that using obj... » read more

From Simulation To Emulation
By Mentor, a Siemens Business - 12 Aug, 2015 - Comments: 0

This paper introduces an acceleration-ready UVM framework and explains why it is needed, how to create it, and what its benefits are. By following the principles presented here, users will be able to write block-level UVM environments that can be reused directly in emulation. This approach has provided remarkable results in various customer environments, yielding a 50 to 5000X performance gain ... » read more

Making Hardware Design More Agile
By Ed Sperling - 12 Aug, 2015 - Comments: 1

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy