The Week In Review: Manufacturing

Fab tools
Applied Materials has launched a suite of products that will enable cobalt metallization schemes for contacts and interconnects in chips at advanced nodes.

The products from Applied enable a complete cobalt fill process. The tools include CMP, CVD, PVD and RTP systems. At advanced nodes, cobalt promises to reduce unwanted resistance in the critical parts of a chip. Cobalt is being used to replace tungsten in some cases. Then, some but not all chipmakers are using cobalt to replace some of the copper metallization layers in devices.

Chipmakers are moving ahead with transistor scaling at advanced nodes. But the industry is struggling to maintain the same timeline for contacts and interconnects, which represent a larger portion of the cost and unwanted resistance in chips at the most advanced nodes.

The interconnects, which reside on the top of the transistor, consist of tiny copper wiring schemes that transfer electrical signals from one transistor to another. Those interconnects are becoming more compact at each node, causing an unwanted resistance-capacitance (RC) delays in chips.

Compounding the resistance issues is a relativity new layer called the middle-of-line (MOL). The MOL connects the separate transistor and interconnect pieces using a series of contact structures based on tungsten.

That’s where cobalt fits in. It helps solve the resistance and other issues in chips. “Five years ago, Applied anticipated an inflection in the transistor contact and interconnect, and we began developing an alternative materials solution that could take us beyond the 10nm node,” said Prabu Raja, senior vice president of Applied’s Semiconductor Products Group.

In chips, cobalt has been adopted in incremental steps over the years. Initially, the technology was implemented in the interconnect. Starting at 20nm, some began to replace tantalum with cobalt for the liner. Cobalt reduces the thickness of the liner. The barrier layer remains a tantalum nitride material.

Now, chipmakers are introducing cobalt in other parts of a device, namely the metallization scheme. “And this replaces, in certain cases, copper metal and in other cases, tungsten metal that are used today in the logic space. Cobalt is introduced because it has a lower resistance at smaller dimensions. It has excellent ability to fill small features,” said Kevin Moraes, vice president of product management in the metal deposition and packaging business group at Applied, in a conference call with analysts.

But this requires more than one tool and process. “Integrating these new materials is going to require different kinds of dry-cleans, different kinds of deposition technologies, PVD in some cases, CVD and ALD in other cases. It requires innovations in planarization and etching, wet-clean and in some cases, modification of these materials,” Moraes said.

To enable the use of cobalt as a conducting material, Applied has combined several steps – pre-clean, PVD, ALD and CVD – on its Endura platform. Then, Applied has defined an integrated cobalt suite that includes anneal on the Producer platform, planarization on the Reflexion LK Prime CMP platform and e-beam inspection on the PROVision platform.

Meanwhile, the industry is already moving towards cobalt. For example, Intel moved from tungsten to cobalt for MOL contacts at 10nm. Other chipmakers are moving towards cobalt contacts for the MOL as well. For the MOL in leading-edge devices, “tungsten’s day is kind of coming to an end,” said Jonathan Bakke, global product manager at Applied.

At the same time, meanwhile, Intel switched from copper to cobalt for the first two metal layers of the interconnect at 10nm. The other layers still use copper.

Intel’s move is a milestone in the industry. “We look at cobalt as really important in the industry, because it’s the first time the metal has actually changed since 1997. This is when aluminum transitioned to copper,” Bakke said. “The lower interconnects, that are made of copper, are having challenges on major fronts.”

Not all chipmakers are using cobalt for interconnects, at least for now. Cost and integration challenges are just some of the issues.

Chipmakers
Micron, Samsung and SK Hynix are being investigated by China’s government, according to Bloomberg. Many speculate that it involves DRAM prices. Prices for DRAM remain high in the market. In fact, China’s Anti-Monopoly Bureau of Ministry of Commerce recently held a meeting with representatives from Micron Technology “to express concerns about the continuing price increase for PC DRAM products over the past quarters,” according to TrendForce, a research firm. “The rising prices have made Chinese PC-OEMs struggling under component cost pressure.”

United Microelectronics Corp. (UMC) announced that it was ranked in the top 5% of companies for Corporate Governance Evaluation by the Taiwan Stock Exchange and Taipei Exchange.

Packaging and Materials
Entegris has entered into a definitive agreement to acquire the SAES Pure Gas business from SAES Getters S.p.A. The SAES Pure Gas business is a provider of high-capacity gas purification systems used in semiconductor manufacturing and adjacent markets. Under the agreement, Entegris will purchase the shares and assets which comprise the SAES Pure Gas business for approximately $355 million, subject to customary purchase price adjustments.

IEEE and the IEEE Electronics Packaging Society (EPS) have announced that William Chen is the recipient of the 2018 IEEE Electronics Packaging Award. Chen is an IEEE life fellow and fellow of the ASE Group.

Market research
U.S. trade tensions with China are heating up after a brief pause. On May 29, the White House released a statement, announcing that it would move forward with a 25% tariff on $50 billion worth of goods imported from China, according to Jay Chittooran, public policy manager at SEMI, in a blog. “Besides focusing on goods that the U.S. has deemed are tied to ‘Made in China 2025’ – the Chinese initiative to produce more advanced manufacturing goods domestically – the Administration also announced stiffer investment restrictions and enhanced export controls related to the acquisition of industrially significant technology,” Chittooran wrote. “The final tariff list will be published by June 15th, and the proposed list of investment restrictions and export controls will be announced by June 30th.”

SEMI reported that worldwide semiconductor manufacturing equipment billings reached a historic quarterly high of $17.0 billion for the first quarter of 2018.

The Semiconductor Industry Association (SIA) announced worldwide sales of semiconductors reached $37.6 billion for the month of April 2018, an increase of 20.2% from the April 2017 total of $31.3 billion and 1.4% more than last month’s total of $37.1 billion. Additionally, a newly released WSTS industry forecast projects annual global market growth of 12.4% in 2018 and 4.4% in 2019.