Week in Review: Design, Low Power

The U.S. Department of Energy (DOE) has awarded $35 million for 12 projects involving ultra-efficient power management. Called Arpa-E, the program encouraged participants to use medium-voltage electricity in new ways with real-world applications, such as industry, transportation and the grid. The top two award winners were Eaton Corp. (Arden, NC) for its DC wide-bandgap static circuit breaker, winning $3,760,000, and Ohio State University (Columbus, OH) for its GaN MOCVD growth on native substrates for high voltage (15-20 kV) vertical power services—earning $2,211,712.

Tools & IP
AdaCore says it is working with NVIDIA to implement Ada and Spark programming languages in some of NVIDIA’s security-critical firmware used in safety- and security-critical applications, such as automated and autonomous driving. NVIDIA is migrating some of its SoCs to the open-source RISC-V instruction set architecture and rewriting some of its security firmware from C to Ada and Spark. Ada has been around since the late 1970s, when it was commissioned by the U.S. Department of Defense. Ada has inspired true believers for its easier to learn syntax, its interoperability with other languages, its static analysis and process for avoiding bugs, although C became the most popular language for embedded systems programming. The move to Ada and the Ada-based Spark languages are intended to help make NVIDIA’s verification process more efficient when complying with ISO-26262.

ANSYS announced its ANSYS Cloud to give its customers on-demand simulation and high-performance computing. Engineers can get high-fidelity simulation results and save time when evaluating design variations by using ANSYS’s Cloud. “ANSYS Cloud puts the power of on-demand hardware and software delivered from the cloud in the hands of ANSYS customers to tackle their largest simulation models and provide unprecedented insights into product designs,” said Navin Budhiraja, vice president and general manager, cloud and platform business unit at ANSYS. “ANSYS Cloud uniquely combines ANSYS software with Microsoft Azure services and HPC infrastructure to create completely seamless cloud access, while still providing the robust, secure and high-performance simulation technology our customers expect.”

Supporting RISC-V, SmartDV Technologies has released verification IP for RISC-V-based systems. The IP is compliant with standard TileLink specifications and the company says it offers “faster testbench development, more complete verification with built- in coverage analysis and simplified results analysis.”

Numbers & People
Marvell expects to miss its fourth-quarter fiscal 2019 target by $55 million to $85 million because of weaker than expected storage controller business. Although the company sees the slowdown continuing, it says demand for its embedded processors for networking, 4G and pre-5G wireless is holding strong. Marvell announced on Feb. 6 that its preliminary unaudited revenue is in the range of $735 million to $745 million, below its guidance range of $790 million to $830 million. Marvell attributes the weakness in the storage controller business to “macroeconomic uncertainty, reduction in cloud capital spending and PC CPU shortages.”

Deals
NationalChip, based in Hangzhou, China, has embedded Arteris IP‘s FlexNoC interconnect IP into its satellite and terrestrial digital TV set-top box SoCs as the on-chip communication backbone. The set top boxes are now in production. The FlexNoC IP, which is a security firewall, strengthens the content digital rights management (DRM) at the system level and helps with reduce power consumption, according to the companies.

AI chip designer FABU Technology, which specializes in autonomous automotive, will use Synopsys‘ IP to deliver intelligence in ADAS and autonomous driving SoCs, according to a press release. FABU is working on high-performance AI SoCs for advanced automotive applications, such as object and lane detection, traffic light detection, vehicle localization, motion analysis, and environmental recognition.

Events
DVCon 2019: Feb. 25-28 in San Jose, CA. This year’s keynote will argue why it’s important to have an integrated digitalization strategy. Other highlights include a tutorial covering new features in IEEE 1800.2-UVM, a workshop on functional coverage in SystemC, and panels on deep learning and the verification of open ISAs.

DATE 2019: Mar. 25-29 in Florence, Italy. The conference and exhibition will feature keynotes on heterogeneous computing in cloud and HPC as well as the limitations of modeling frameworks for intelligent systems. Sessions will highlight emerging design technologies, design and test of secure systems, embedded systems for deep learning, and more. Advanced registration closes Mar. 13.