US imposes more export controls on China, exempts TSMC and SK Hynix; Intel announces internal foundry; SEMI’s Semiconductor worldwide forecast.
The United States imposed further export controls aimed at preventing foreign firms from selling advanced chips to China or supplying Chinese firms with semiconductor processing tools. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. Officials noted that they have not secured any promises from allied nations that they would implement similar measures.
Additionally, the U.S. added YMTC and 30 other Chinese entities to the Entity List, an “unverified” list of companies that U.S. officials have been unable to inspect, starting a 60 day-clock that could trigger tougher penalties. YMTC is under investigation for allegedly selling chips to Huawei.
SIA issued this response to the controls: “We are assessing the impact of the new export controls on the U.S. semiconductor industry and working with our member companies and the U.S. government to ensure compliance. We understand the goal of ensuring national security and urge the U.S. government to implement the rules in a targeted way — and in collaboration with international partners — to help level the playing field and mitigate unintended harm to U.S innovation.”
Other immediate responses:
The CHIPS Implementation Steering Council met for the first time last Thursday. Participants discussed how implementation of the Act will strengthen American leadership in the semiconductor industry, boost economic competitiveness, and protect national security. Officials offered their roadmaps for implementation across various agencies, including the Departments of Commerce, Defense, State, and the National Science Foundation.
Intel announced the creation of an internal foundry model for external customers and Intel product lines, and the creation of the IDM 2.0 Acceleration Office, under the leadership of Stuart Pann. “Implementing an internal foundry model means establishing consistent processes, systems and guardrails between our business unit, design and manufacturing teams,” said Intel CEO Pat Gelsinger. “This will allow us to identify and address structural inefficiencies that exist in our current model by driving accountability and costs back to decision-makers in real-time. It will also put Intel’s product groups on a similar footing as external Intel Foundry Services customers, and vice versa.”
The U.S. Department of Defense (DoD) is investing $12 million to expand the IP ecosystem for Skywater’s 90nm radiation-hardened (rad-hard) platform, as part of the previously announced $27 million investment.
Siemens Digital Industries Software announced the latest release of Solid Edge software for product design, engineering and manufacturing, enabling greater interoperability with the Siemens Xcelerator portfolio.
QP Technologies expanded its process capabilities to meet increasing demand for packaging and assembly, including wafer preparation and substrate design and development.
proteanTecs inked a deal with Advantest, which will offer four of proteanTecs’ applications for assessing die, aggregating measurements, and deep data analytics insights at the product and sub-product level on its site. The applications deploy deep-learning decision models in the test equipment through a container.
Semiconductor manufacturing worldwide is forecast to grow 300mm fab capacity at a nearly 10% compound average growth rate (CAGR) from 2022 to 2025, reaching an all-time high of 9.2 million wafers per month, according to SEMI’s latest 300mm Fab Outlook to 2025 report. Robust demand for automotive chips as well as and new government funding are driving growth.
Techcet forecasts that the overall photoresist market will exceed $200M by 2025, according to its Critical Materials Report on photolithography.
In a study published in ACS Applied Materials & Interfaces, Caltech researchers grew graphene directly onto thin two-dimensional copper lines commonly used in electronics. The results showed that the graphene not only improved the lines’ conductivity, but also protected the interconnects from processing damage.
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