tag: CMOS

Novel NVM Devices and Applications (UC Berkeley)
By Technical Paper Link - 06 Oct, 2023 - Comments: 0

A dissertation titled “Novel Non-Volatile Memory Devices and Applications” was submitted by a researcher at University of California Berkeley. Abstract Excerpt "This dissertation focuses on novel non-volatile memory devices and their applications. First, logic MEM switches are demonstrated to be operable as NV memory devices using controlled welding and unwelding of the contacting electro... » read more

Applying a Floating Gate Field Effect Transistor To A Logic-in-Memory Application Circuit Design
By Technical Paper Link - 19 Sep, 2023 - Comments: 0

A technical paper titled “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)” was published by researchers at Konkuk University, Korea National University of Transportation, Samsung Electronics, and Sungkyunkwan University. Abstract: "The high data throughput and high energy efficiency required recently are increasingly difficult to implement... » read more

Wafer-Scale CMOS-Integrated GFET Arrays With High Yield And Uniformity Designed For Biosensing Applications
By Technical Paper Link - 06 Sep, 2023 - Comments: 0

A technical paper titled “Wafer-Scale Graphene Field-Effect Transistor Biosensor Arrays with Monolithic CMOS Readout” was published by researchers at VTT Technical Research Centre of Finland and Graphenea Semiconductor SLU. Abstract: "The reliability of analysis is becoming increasingly important as point-of-care diagnostics are transitioning from single-analyte detection toward multiplex... » read more

Analog Circuits Enabling Learning in Mixed-Signal Neuromorphic SNNs, With Tristate Stability and Weight Discretization Circuits
By Technical Paper Link - 02 Aug, 2023 - Comments: 0

A technical paper titled “Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks” was published by researchers at University of Zurich and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their spiking neural network circui... » read more

A Flip-Chip, Co-Packaged With Photodiode, High-speed TIA in 16nm FinFET CMOS
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes" was published by researchers at University of Toronto, Alphawave IP, and Huawei Technologies Canada. Abstract: "A flip-chip co-packaged linear transimpedance amplifier (TIA) in 16-nm fin field effect transistor (FinFET) CMOS demonstrating 112-Gb/s four-level pulse-amplitude... » read more

Topological Semimetal Synthesized Thin Film That Can Increase Power and Memory Storage While Using Less Energy
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Robust negative longitudinal magnetoresistance and spin-orbit torque in sputtered Pt3Sn and Pt3SnxFe1-x topological semimetal" was published by researchers at University of Minnesota. Abstract: "Contrary to topological insulators, topological semimetals possess a nontrivial chiral anomaly that leads to negative magnetoresistance and are hosts to both conductive bulk ... » read more

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks" was published by researchers at Institute of Neuroinformatics, University of Zurich, and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their s... » read more

Search Based Method For Identifying Aging Model Parameters
By Technical Paper Link - 24 Jun, 2023 - Comments: 0

A technical paper titled “Leveraging Public Information to Fit a Compact Hot Carrier Injection Model to a Target Technology” was published by researchers at University of Victoria. Abstract: "The design of countermeasures against integrated circuit counterfeit recycling requires the ability to simulate aging in CMOS devices. Electronic design automation tools commonly provide this ability... » read more

The History Of CMOS
By Paul McLellan - 25 May, 2023 - Comments: 0

Since CMOS has been around for about 50 years, a comprehensive history would be a book. This blog focuses on what I consider the major transitions. NMOS Before CMOS, there was NMOS (also PMOS, but I have no direct experience with that). An NMOS gate consisted of a network of N-transistors between the output and Vss, and a resistor (actually a transistor with an implant) between the output and... » read more

What Data Center Chipmakers Can Learn From Automotive
By Anne Meixner - 11 Apr, 2023 - Comments: 2

Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy