Sizing up China’s Fab Tool Biz


China is pouring billions of dollars into its semiconductor industry and is building several new fabs. As reported, China is bolstering its IC industry for good reason. China is trying to reduce its huge trade imbalance in ICs. The country continues to import a large percentage of its chips from foreign vendors. Behind the scenes, China also continues to develop its domestic semiconductor eq... » read more

The Week In Review: Manufacturing


Fab equipment and test VLSI Research has released its top 10 semiconductor equipment supplier ranking in terms of sales in 2016. Applied Materials topped the list again, achieving a growth of 18%. ASML was second, followed by Lam Research, TEL and KLA-Tencor. Fig. 1: Ranking based on 2016 sales. Source: VLSI Research. Unic Capital Management, a Chinese-based private equity fund, announ... » read more

Fractilia: Pattern Roughness Metrology


A new startup has emerged and unveiled a technology that addresses one of the bigger but less understood problems in advanced lithography--pattern roughness. The startup, called Fractilia, is a software-based metrology tool that analyzes the CD-SEM images of pattern roughness on a wafer. Fractilia, a self-funded startup, is led by Chris Mack and Ed Charrier. Mack, known as the gentleman sc... » read more

Battling Fab Cycle Times


The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node. Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and... » read more

Accuracy In Optical Overlay Metrology


By Barak Bringoltz, Tal Marciano, Tal Yaziv, Yaron DeLeeuw, Dana Klein, Yoel Feler, Ido Adam, Evgeni Gurevich, Noga Sella, Ze’ev Lindenfeld, Tom Leviant, Lilach Saltoun, Eltsafon Ashwal, Dror Alumot and Yuval Lamhot, Xindong Gao, James Manka, Bryan Chen, and Mark Wagner. Abstract In this paper we discuss the mechanism by which process variations determine the overlay accuracy of optical m... » read more

Fab Tool Biz Faces Challenges In 2017


After experiencing a gradual recovery and positive growth in 2016, the semiconductor equipment industry sees a mixed picture as well as some uncertainty in 2017. In the near term, though, business is robust. Several chipmakers started to place a sizeable number of fab tool orders in the latter part of 2016, particularly in three areas—3D NAND, logic and foundry. Now, after buying the in... » read more

Highly Sensitive Focus Monitoring Technique Based On Illumination And Target Co-Optimization


By Myungjun Lee, Mark D. Smith, Pradeep Subrahmanyan, and Ady Levy. Abstract We present a cost-effective focus monitoring technique based on the illumination and the target co-optimization. An advanced immersion scanner can provide the freeform illumination that enables the use of any kind of custom source shape by using a programmable array of thousands of individually adjustable micro-mi... » read more

Can We Measure Next-Gen FinFETs?


After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

More EUV Mask Gaps


Extreme ultraviolet (EUV) lithography is at a critical juncture. After several delays and glitches, [gettech id="31045" comment="EUV"] is now targeted for 7nm and/or 5nm. But there are still a number of technologies that must come together before EUV is inserted into mass production. And if the pieces don’t fall into place, EUV could slip again. First, the EUV source must generate more ... » read more

The Week In Review: Manufacturing


Chipmakers At upcoming the 2016 IEEE International Electron Devices Meeting (IEDM) in San Francisco, TSMC will square off against the alliance of IBM, GlobalFoundries and Samsung at 7nm. IEDM will take place Dec. 3-7, 2016. TSMC will present a paper on 7nm finFET technology. Using 193nm immersion and multi-patterning, the 7nm technology features more than three times the gate density and ei... » read more

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