Tech Talk: 2.5D Issues

Bill Isaacson, director of ASIC marketing at eSilicon, about how viable this packaging approach is, organic vs. inorganic interposers, where the problems are, thermal coupling, interposer cost, and what will change over the next couple years. [youtube vid=t6KUnC-oU5g] » read more

Tech Talk: Mobile Security (Part 2)

Simon Blake Wilson of Rambus' Cryptography Research Division talks about where security needs to fit into the design flow and where the biggest risks are. To view part one of this video, click here. [youtube vid=_nnniakpP3M] » read more

Tech Talk: 2.5D Stacked Die

What's the motivation for moving to 2.5D packaging and architectures rather than following Moore's Law? Shafy Eltoukhy, VP of operations and technology development at Open-Silicon, talks with Semiconductor Engineering about adding another dimension in semiconductors. [youtube vid=HwpY9bUNt0w] » read more

The “Last Simple Node” And the Internet of Things

Power, performance and size are key targets that will enable the expected explosion of the Internet of Things (IoT). Today, most observers see the path to that running directly through 16/14nm finFET and below for the node’s ability to manage power and size and boost integration. Geoff Lees isn’t your average observer. The vice president and general manager of Freescale’s microcon... » read more

Experts At The Table: Does 20nm Break System-Level Design?

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at At... » read more