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Neuromorphic Devices Based On Memristive Nanowire Networks
By Technical Paper Link - 16 Nov, 2023 - Comments: 0

A technical paper titled “Online dynamical learning and sequence memory with neuromorphic nanowire networks” was published by researchers at University of Sydney, University of California Los Angeles (UCLA), National Institute for Materials Science (NIMS), Kyushu Institute of Technology (Kyutech), and University of Sydney Nano Institute. Abstract: "Nanowire Networks (NWNs) belong to an em... » read more

Hybrid Photoresist Capable Of High-Resolution, Positive-Tone EUVL Patterning
By Technical Paper Link - 16 Nov, 2023 - Comments: 0

A technical paper titled “Vapor-Phase Infiltrated Organic–Inorganic Positive-Tone Hybrid Photoresist for Extreme UV Lithography” was published by researchers at Stony Brook University, Brookhaven National Laboratory, and University of Texas at Dallas. Abstract: "Continuing extreme downscaling of semiconductor devices, essential for high performance and energy efficiency of future microe... » read more

Analog In-Memory Cores With Multi-Memristive Unit-Cells (IBM)
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “Exploiting the State Dependency of Conductance Variations in Memristive Devices for Accurate In-Memory Computing” was published by researchers at IBM Research-Europe, IBM Research-Albany, and IBM Research-Yorktown Heights. Abstract: "Analog in-memory computing (AIMC) using memristive devices is considered a promising Non-von Neumann approach for deep learning (DL... » read more

A HIL Methodology For The SoC Development Flow
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap” was published by researchers at University of Bremen and German Research Center for Artificial Intelligence (DFKI). Abstract: "Virtual Prototypes act as an executable specification model, offering a unified behavior reference model for SW and HW engineers. However, b... » read more

Using Atomic Vacancies In Silicon Carbide To Measure The Stability And Quality Of Acoustic Resonators
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “Spin-acoustic control of silicon vacancies in 4H silicon carbide” was published by researchers at Harvard University and Purdue University. Abstract: "Bulk acoustic resonators can be fabricated on the same substrate as other components and can operate at various frequencies with high quality factors. Mechanical dynamic metrology of these devices is challenging as... » read more

Verifying The Integrity Of ICs Based On Their Electromagnetic (EM) Near-Field Emissions
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis” was published by researchers at University of Florida and Brookhaven National Laboratory. Abstract: "Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics... » read more

High-Speed Sparse Scanning Kelvin Probe Force Microscopy
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy” was published by researchers at Oak Ridge National Laboratory, (ORNL), Sungkyunkwan University, Case Western Reserve University, Flinders University, Bedford Park, and UNSW Sydney. Abstract: "Unraveling local dynamic charge processes is vital for progress in diverse... » read more

Highly Stacked Nanowire FETs To Enhance Drive Current And Transistor Density
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Fabrication and performance of highly stacked GeSi nanowire field effect transistors” was published by researchers at National Taiwan University. Abstract: "Horizontal gate-all-around field effect transistors (GAAFETs) are used to replace FinFETs due to their good electrostatics and short channel control. Highly stacked nanowire channels are widely believed to en... » read more

Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

Applications Of Large Language Models For Industrial Chip Design (NVIDIA)
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “ChipNeMo: Domain-Adapted LLMs for Chip Design” was published by researchers at NVIDIA. Abstract: "ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we instead adopt the following domain adaptation techniques: custom tokenizers, domain-ad... » read more

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