Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips


An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. On one hand they need the massive storage and compute resources of the cloud to utilize AI/ML-based models, but they also need the faster response time of the edge to make adjustments at the tool level. Balancing these requirements is a mas... » read more

Rethinking Security In Semiconductor Testing: Why Containment Is The New Imperative


It’s nearly impossible to keep up with the headlines without stumbling upon another major cybersecurity incident. According to recent reports, 2024 witnessed a staggering 5.5 billion breaches globally. In the United States alone, the average cost of a single data breach clocked in at $9.36 million—slightly lower than 2023’s figure, but still a significant hit for any organization. On a gl... » read more

Enabling In-Line Process Control for Hybrid Bonding Applications


As demand grows for high-performance computing (HPC) and AI-driven applications, manufacturers are turning to hybrid bonding to enable the ultra-dense 3D integration required for next-generation chip architectures. This advanced packaging technology presents significant process challenges. Surface preparation must be precisely controlled to eliminate particles, excess recess, and copper pad ... » read more

Multi-Die Verification


Chiplets offer unprecedented flexibility in high-performance designs, but they also add new challenges on the verification side. Changing out a chiplet, or adding a new one, can mean having to re-verify an entire multi-die system, a problem that becomes even more complicated if those chiplets are developed by different vendors. Paul Graykowski, director of product marketing at Cadence Design Sy... » read more

Research Bits: Oct. 13


Mimicking neural plasticity Researchers from Korea Advanced Institute of Science and Technology (KAIST) developed a frequency switching neuristor device that mimics the intrinsic plasticity of neurons. The device can autonomously adjust the frequency of its signals, similar to the way the brain becomes less startled by repeated stimuli or becomes increasingly sensitive through training. The... » read more

Chip Industry Technical Paper Roundup: Oct. 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=482 /] Find more semiconductor research papers here. » read more

The Critical Role Of Virtualization In Automotive Software Development For Software-Defined Vehicles


By Chahinez Hamlaoui, Robert Fey, and David Howarth The automotive industry is undergoing a profound transformation. Vehicles are no longer just mechanical machines, they are becoming sophisticated, software-defined platforms packed with electronics and intelligence. As the number of electronic control units (ECUs) in modern vehicles climbs (with some cars now containing up to 150 ECUs), the... » read more

On-Package Memory With UCIe To Improve Bandwidth Density And Power Efficiency (AMD, Intel Corp.)


A new technical paper titled "On-Package Memory with Universal Chiplet Interconnect Express (UCIe): A Low Power, High Bandwidth, Low Latency and Low Cost Approach" was published by researchers at Intel Corporation and AMD. Abstract "Emerging computing applications such as Artificial Intelligence (AI) are facing a memory wall with existing on-package memory solutions that are unable to meet ... » read more

LLM-Based AI Agent That Automates The Transistor Sizing Process (Univ. of Edinburgh)


A new technical paper titled "EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuit" was published by researchers at The University of Edinburgh. Abstract "The design of Analog and Mixed-Signal (AMS) integrated circuits (ICs) often involves significant manual effort, especially during the transistor sizing process. While Machine Learning techniques in Electronic Design A... » read more

Framework for Optimizing Reliability and Thermal Management of 3DICs (National Taiwan Univ., Lamar Univ.)


A new technical paper titled "The Impact of Process Variations on the Thermo-Mechanical Behavior of 3D Integrated Circuits" was published by researchers at National Taiwan University and Lamar University. Abstract "The use of vertically stacked architectures in three-dimensional integrated circuits (3DICs) offers a transformative path for advancing Moore’s Law by significantly boosting co... » read more

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