Functional Compaction for Functional Test Sequences (Purdue University, I. Pomeranz)


A new technical paper titled "Functional Compaction for Functional Test Sequences" was published by IEEE Fellow Irith Pomeranz at Purdue University. Abstract: "The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware defects that escape scan-based tests. When using funct... » read more

Excitonic Phenomena in TMDs (Harvard, Google, Stanford et al.)


A new technical paper titled "Dynamical Control of Excitons in Atomically Thin Semiconductors" was published by researchers at Harvard University, Google Research, Stanford University, UC Riverside and others. Abstract "Excitons in transition metal dichalcogenides (TMDs) have emerged as a promising platform for novel applications ranging from optoelectronic devices to quantum optics and sol... » read more

Rigid-Flex PCB Design Guidelines


This white paper is designed to guide you through the intricacies of rigid-flex printed circuit board (PCB) design. In today's electronics industry, there has never been more demand for compact, efficient, and versatile PCBs. Rigid-flex technology has emerged as a game-changer, offering engineers the flexibility to design boards that can bend and flex without sacrificing performance or reliabil... » read more

Evolving Edge Computing


Edge computing is a term that has been in use for a long time. Throughout the industry, there are many references to edge and many pre-conceptions about what that might mean. The term ‘edge’ is typically used for devices that exist on the edge of a network and can cover a plethora of use cases, ranging from the router in your house, a smart video camera surveying a parking lot, to a control... » read more

Blog Review: July 17


Cadence's Xin Mu explains the PCIe ECN Unordered IO (UIO) feature in the PCIe 6.1 specification, which defines a new wire semantic and related capabilities to enable multiple-path fabric support and helps avoid unnecessary traffic for better bandwidth and latency. Synopsys' Dana Neustadter, Gary Ruggles, and Richard Solomon highlight the latest updates in the CXL 3.1 standard, including new ... » read more

Speed AND Accuracy: First-Of-Its-Kind Broad-Spectrum CFD Solver Built Natively on GPUs


Since the advent of computational methods to solve physics problems, especially in the realm of fluid dynamics, scientists and engineers have had to balance the need for accurate simulations with faster times to solution — with available computing resources affecting this balance. Now, we introduce to you a new broad-spectrum native GPU solver created by developers at Ansys. Find more i... » read more

Managing kW Power Budgets


Experts at the Table: Semiconductor Engineering sat down to discuss increasing power demands and how to address it with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice president of engineering at Empower Semiconductor.... » read more

Cadence Janus NoC System IP


The Cadence Janus Network on Chip (NoC) is a new highly configurable soft IP designed to speed up the system-on-chip (SoC) and full system design cycle by reducing some of the problems associated with large SoCs. With many more processing nodes, as well as memory and I/O nodes designed into the SoC, the interconnect becomes a major design hurdle. Wiring congestion and wire loads introduce ch... » read more

6G And Beyond: Overall Vision And Survey of Research


A new 92 page technical paper titled "6G: The Intelligent Network of Everything -- A Comprehensive Vision, Survey, and Tutorial" was published by IEEE researchers at Finland's University of Oulu. Abstract "The global 6G vision has taken its shape after years of international research and development efforts. This work culminated in ITU-R's Recommendation on "IMT-2030 Framework". While the d... » read more

Step Towards 3D PICs: Low Loss Fiber-Coupled Interconnects (UIUC)


A new technical paper titled "Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing" was published by researchers at University of Illinois Urbana-Champaign (UIUC). Abstract "Photonic integrated circuits (PICs) are vital for high-speed data transmission. However, optical routing is limited in PICs composed of only one or a few stacked planes. Further, coupling ... » read more

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