Build Battery-Free Smart Locks With NFC Energy Harvesting Technology


Today, battery-powered smart locks with shared access capabilities have become increasingly popular in both consumer and industrial access control applications. However, battery-related issues frequently arise in many use cases. For outdoor applications, fluctuating temperatures and extremes can significantly reduce battery life. Indoor applications, on the other hand, can incur high battery re... » read more

Radix Coverage for Hardware Common Weakness Enumeration (CWE) Guide (updated)


MITRE’s hardware Common Weakness Enumeration (CWE) database aggregates hardware weaknesses that are the root causes of vulnerabilities in deployed parts. In this 100+ page guide, each CWE is listed along with a Radix template Security Rule that can be filled in with design-specific signals and used as a baseline test for the respective CWE. To learn more about a specific CWE, follow the li... » read more

Meeting Stringent PA_SaveConfigTime In UFS Solution When M-PHY Needs Higher Reconfigure Time


The JEDEC Universal Flash Storage (UFS) has emerged as the default mobile storage solution for high-end smartphones and battery-operated devices, owing to its superior speed, performance, and power efficiency. These attributes are essential to meet users' demand for rapid transmission and reception of high-resolution media amid myriad operations. Despite these advantages, UFS's use of the MIPI ... » read more

FMEDA-Driven SoC Design Of Safety-Critical Semiconductors


As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is critical. The Cadence FMEDA-driven Safety Solution consists of products enhanced for advanced safety analysis, safety verification, and safety-aware implementation for digital driving analog and dig... » read more

A New Phase-Change Memory For Processing Large Amounts Of Data 


A technical paper titled “Novel nanocomposite-superlattices for low energy and high stability nanoscale phase-change memory” was published by researchers at Stanford University, TSMC, NIST, University of Maryland, Theiss Research and Tianjin University. Abstract: "Data-centric applications are pushing the limits of energy-efficiency in today’s computing systems, including those based on... » read more

Analysis Of Accel-Sim GPGPU Simulator And Model Improvements


A technical paper titled “Analyzing and Improving Hardware Modeling of Accel-Sim” was published by researchers at Universitat Politècnica de Catalunya. Abstract: "GPU architectures have become popular for executing general-purpose programs. Their many-core architecture supports a large number of threads that run concurrently to hide the latency among dependent instructions. In modern GPU... » read more

RISC-V Ultra-Low-Power Edge Accelerators (EPFL)


A technical paper titled “X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators” was published by researchers at EPFL. Abstract: "The field of edge computing has witnessed remarkable growth owing to the increasing demand for real-time processing of data in applications. However, challenges persist due to limitat... » read more

Heterogeneous Integration of Graphene and Hafnium Oxide Memristors Using Pulsed-Laser Deposition


A technical paper titled “Heterogeneous Integration of Graphene and HfO2 Memristors” was published by researchers at Forschungszentrum Jülich, Jožef Stefan Institute, and Jülich-Aachen Research Alliance (JARA-FIT). Abstract: "The past decade has seen a growing trend toward utilizing (quasi) van der Waals growth for the heterogeneous integration of various materials for advanced electro... » read more

Overview Of Spin-Orbit Torque Vs. Spin-Transfer Torque For MRAM Devices 


A technical paper titled “Perspectives on field-free spin-orbit torque devices for memory and computing applications” was published by researchers at Northwestern University. Abstract: "The emergence of embedded magnetic random-access memory (MRAM) and its integration in mainstream semiconductor manufacturing technology have created an unprecedented opportunity for engineering computing s... » read more

How To Stop Row Hammer Attacks


Row hammer is a well-publicized target for cyberattacks on DRAM, and there have been attempts to stop these attacks in DDR4 and DDR5, but with mixed results. The problem is that as density increases, distance decreases, making it more likely that flipped bit cell in one row can disturb a bit cell in another, and that bits flipped across an entire row can flip another row. Steven Woo, fellow and... » read more

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