Making Hybrid Bonding Better

By Laura Peters - 02 Mar, 2026 - Comments: 0

Key Takeaways Fab processes are optimizing for cleanliness, planarity, and high bond quality. Nanotwinned copper and SiCN PVD enable lower anneal and deposition temperatures for HBM. A thin, protective layer helps preserve the Cu/dielectric during aggressive processes. The future of semiconductor manufacturing is no longer dependent just on shrinking features. Instead, chipm... » read more

Optimal Heterogeneous Memory Configs for AI Tasks Under Specified Performance Metrics (Stanford, UCSC)

By Technical Paper Link - 01 Mar, 2026 - Comments: 0

Researchers from Stanford University and University of California, Santa Cruz have released “Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler”. Abstract “As memory increasingly dominates system cost and energy, heterogeneous on-chip memory systems that combine technologies with complementary characteristics are becoming essential. Gain ... » read more

A GPU Microarchitecture Optimized for Fully Homomorphic Encryption

By Technical Paper Link - 01 Mar, 2026 - Comments: 0

Researchers from Boston University, Northeastern University, KAIST, and University of Murcia, et al. have released “FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption”. Abstract“Fully Homomorphic Encryption (FHE) enables computation directly on encrypted data but incurs massive computational and memory overheads, often exceeding plaintext execution by seve... » read more

Chip Industry Week In Review

By The SE Staff - 27 Feb, 2026 - Comments: 0

Big Deals and Fundings Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year. Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon. In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD's GPUs. SambaNova and Intel ar... » read more

An FPGA-based Accelerator Addressing Bottlenecks in GNN Preprocessing (KAIST et al.)

By Technical Paper Link - 26 Feb, 2026 - Comments: 0

A new technical paper "AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance" was published by researchers at KAIST, Panmnesia, Peking University, Hanyang University, and Pennsylvania State University. Abstract "Graph neural network (GNN) inference faces significant bottlenecks in preprocessing, which often dominate overall inference latency. We introduce Au... » read more

CMOS-Compatible Approach to Extending the Spectral Response of Oxide Semiconductors

By Technical Paper Link - 26 Feb, 2026 - Comments: 0

A new technical paper titled "Sputtering-driven formation of interstitial oxygen for intrinsic NIR detection in IGZO phototransistor" was published by researchers at KICET, Korea University, Yonsei University, and Argonne National Lab. Abstract "Amorphous indium gallium zinc oxide (a-IGZO) is a promising wide-bandgap semiconductor for large-area optoelectronics; however, its intrinsic ins... » read more

How IP Subsystems For Chiplets Will Unlock Your Next Wave Of Innovation

By Robert Kruger - 26 Feb, 2026 - Comments: 0

After many years of hope, promises, and commercial challenges, a robust environment that supports multi-die design is now taking shape. These events represent a sea of change for semiconductor design and manufacturing when compared to the traditional single-die monolithic design approach. Moore’s Law drove these original and substantial monolithic design accomplishments. But the massive requi... » read more

AI Energy Gap And Chiplets: Why Data Movement Matters

By Ashley Stevens - 26 Feb, 2026 - Comments: 0

At the recent Chiplet Summit 2026 preconference tutorial, the panel session, “Best Way to Make Chiplets Work,” brought together leaders from across the semiconductor ecosystem to tackle one of the most pressing challenges in advanced system design: how do we make heterogeneous, multi-die systems operate as a cohesive, energy-efficient whole for AI? While much discussion focused on st... » read more

Using Data And AI More Effectively In EDA

By Brian Bailey - 26 Feb, 2026 - Comments: 0

Key Takeaways The data being produced by EDA tools tends to be for human consumption and has weak semantics. Agents are attempting to create actionable information from unstructured data. The Model Context Protocol may provide AI with access to better data. Semiconductor design generates a lot of data, but how much of that is useful or currently being used by AI tools? And h... » read more

AI Starting To Simplify Design Of Programmable Logic

By Liz Allan - 26 Feb, 2026 - Comments: 0

Key Takeaways AI/ML and agentic tools are getting better at helping design and compile FPGAs, but downstream programming is slower to benefit. FPGAs historically have been designed using Verilog or VHDL, but higher-level languages could push more intelligence into compilers. ML tools can also help with mixed-signal co-design by automatically tuning DSP algorithms based on analog simu... » read more

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