Driving Performance In GaN-Based USB-C Adapters And Chargers With EPR


With the announcement of the USB PD 3.1 standard [1], higher power levels of up to 240 W are enabled. Still, the wide output voltage range from 5 V to 48 V raises new challenges for the converter topologies currently in use. In this white paper, the combination of an AC-DC PFC boost and a DC-DC hybrid flyback (HFB) stage [2], also well known as asymmetrical half-bridge flyback topology, is prop... » read more

Chip Industry’s Technical Paper Roundup: May 2


New technical papers recently added to Semiconductor Engineering’s library: [table id=95 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

TSMC Targets N2 Production For 2025


April ended with TSMC’s financial results for the 1st Quarter of 2023 reported on April 20, 2023, and their North American Technology Symposium was held on April 27 at the Santa Clara Convention Center. TSMC’s N3 entered volume production in 4Q 2022 and TSMC’s N2 “nanosheet” technology is on schedule for production in 2025. TSMC’s CEO, C.C. Wei, said during the 1Q conference cal... » read more

Research Bits: May 2


Reconfigurable FeHEMT Researchers at the University of Michigan created a reconfigurable ferroelectric transistor that could enable a single amplifier to do the work of multiple conventional amplifiers. “By realizing this new type of transistor, it opens up the possibility for integrating multifunctional devices, such as reconfigurable transistors, filters and resonators, on the same plat... » read more

ML-Based Third-Party IP Trust Verification Framework (U. of Florida, U. of Kansas)


A technical paper titled "Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing" was published by researchers at University of Florida and University of Kansas. Abstract: "System-on-chip (SoC) developers increasingly rely on pre-verified hardware intellectual property (IP) blocks often acquired from untrusted third-party vendors. These IPs might contain hidd... » read more

EDA Posts Q4 2022 Revenue of $3.9B


The ESD Alliance, a SEMI Technology Community, announced today in its latest Electronic Design Market Data (EDMD) report that the Electronic System Design (ESD) industry revenue increased 11.3% from $3.47 billion in the fourth quarter of 2021 to $3.86 billion in the fourth quarter of 2022. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 12.6... » read more

AI Adoption Slow For Design Tools


A lot of excitement, and a fair amount of hype, surrounds what artificial intelligence (AI) can do for the EDA industry. But many challenges must be overcome before AI can start designing, verifying, and implementing chips for us. Should AI replace the algorithms in use today, or does it have a different role to play? At the end of the day, AI is a technique that has strengths and weaknesses... » read more

Can AI Write RTL?


Just a few months ago, generative AI was just a promise about what would be possible in the future. Today, nearly everyone with an ounce of curiosity has tried ChatGPT. Most people appear to be somewhat impressed with what it can do, but at the same time see the limitations that it has. As Dean Drako, founder of several companies, told me: "Recently, I needed to write a patent. I described t... » read more

GaN Power Devices: Stability, Reliability and Robustness Issues


A technical paper titled "Stability, Reliability, and Robustness of GaN Power Devices: A Review" was published by researchers at Virginia Polytechnic Institute and State University, Johns Hopkins University Applied Physics Laboratory, and Kyushu University. "Gallium nitride (GaN) devices are revolutionarily advancing the efficiency, frequency, and form factor of power electronics. However, t... » read more

EPFL’s Open Source Single-Core RISC-V Microcontroller for Edge Computing


A new technical paper titled "X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller" was published by researchers at Ecole Polytechnique Fédérale de Lausanne (EPFL). Abstract: "In this work, we present eXtendible Heterogeneous Energy-Efficient Platform (X-HEEP), a configurable and extendible single-core RISC-V-based ultra-low-power microcontroller. X-HEEP can be used ... » read more

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