Automotive E/E Architectures with Safety Related Availability (SaRa) Requirements For Highly Autonomous Driving


A technical paper titled "Multi-objective optimization for safety-related available E/E architectures scoping highly automated driving vehicles" was written by researchers at Robert Bosch GmBbH and University of Luxembourg. Abstract: "Megatrends such as Highly Automated Driving (HAD) (SAE ≥ Level-3), electrification, and connectivity are reshaping the automotive industry. Together with th... » read more

3-Terminal Thermal Transistor With Thermal Measurements For The Switching And Amplification


A technical paper titled "A three-terminal magnetic thermal transistor" was published my researchers at Rice University (Texas). Abstract "Three-terminal thermal analogies to electrical transistors have been proposed for use in thermal amplification, thermal switching, or thermal logic, but have not yet been demonstrated experimentally. Here, we design and fabricate a three-terminal magneti... » read more

Efficiently Process Large RM Datasets In Underlying Memory Pool, Disaggregated Over CXL (KAIST)


A technical paper titled "Failure Tolerant Training with Persistent Memory Disaggregation over CXL" was published (preprint) by researchers at KAIST and Panmnesia. "TRAININGCXL can efficiently process large-scale recommendation datasets in the pool of disaggregated memory while making training fault tolerant with low overhead," states the paper. Find the technical paper here. or here (IEE... » read more

Week In Review: Semiconductor Manufacturing, Test


Starting in 2025, SEMICON West will move to Phoenix for a five-year annual rotation. And in 2024, it will shift dates from July to October. This year’s conference will still take place July 11 to 13 at the Moscone Center. Phoenix will first host SEMICON West on October 7-9, 2025. Thereafter, it will be held at the Moscone Center in San Francisco on the alternating years and over the long term... » read more

Week In Review: Auto, Security, Pervasive Computing


The U.S. Department of Defense updated the directive that governs the development and fielding of autonomous and semi-autonomous weapon systems. The revisions include an expanded focus on artificial intelligence, and reference to recently-established organizations like the DoD’s Chief Digital and Artificial Intelligence Office. NIST released a new guidance document aimed at helping organi... » read more

Week In Review: Design, Low Power


Electronic system design (ESD) industry revenue is up 8.9% from $3,458.2 million in Q3 2021 to $3,767.4 million in Q3 2022 according to a report from SEMI’s ESD Alliance. Read our in-depth take on what this means. In an attempt to make a viable reusable DNA biosensor probe, NIST researchers used an extremely low-power FETdeveloped at CEA-LETI to remove noise in their DNA biosensor circuitr... » read more

A New Year’s Wish


Every year I run a predictions article. It is a mashup of ideas from many people within the industry, and while many predictions are somewhat self-serving, there are other which come more from the heart — or perhaps they are dreams rather than expectations. I see hope in some of those, particularly the ones that look toward sustainability within our industry, and of our industry. Just like... » read more

The Importance Of Phase-Coherent RF Signal


As the number of higher-throughput applications grows, so does the need for wider bandwidth and network coverage in wireless systems. Given limited spectrum allocation, wireless communication engineers must look for ways to improve spectral efficiency and the signal-to-noise ratio (SNR) of systems. Multiple-input / multiple-output (MIMO) and beamforming can help RF designers achieve diversity, ... » read more

IEDM: TSMC N3 Details


I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually a bit of a misnomer since TSMC has two N3 processes, one simply called N3. The other (the second generation) is called N3E. The two papers were: Critical Process Features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond A 3nm CMOS FinFl... » read more

Benefits Of A Silicon-Proven 800G Ethernet Solution For High-Performance Computing


The evolution of high-speed Ethernet began in 2014 when Arista, Broadcom, Microsoft, Mellanox and Google formed the Ethernet Consortium, now called the “Ethernet Technology Consortium.” Since then, the technology has been adopted by more than 45 members. The push for 200G, then 400G, and now 800G Ethernet is driven by the insatiable need to process and transmit high-performance workloads in... » read more

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