Site-To-Site Variation In Parallel Test


From wafer to system level test, parallel test execution delivers significant benefits, including reduced costs, yet it’s never as simple as that PowerPoint slide you present to management. An engineering effort is required to balance the thermo-electrical challenges that occur as you increase the number of sites to be tested, or the number of slots in a burn-in oven or system level te... » read more

Vertical MoS2 transistors with sub-1-nm gate lengths


Abstract "Ultra-scaled transistors are of interest in the development of next-generation electronic devices. Although atomically thin molybdenum disulfide (MoS2) transistors have been reported, the fabrication of devices with gate lengths below 1 nm has been challenging. Here we demonstrate side-wall MoS2 transistors with an atomically thin channel and a physical gate length of sub-1 nm ... » read more

Large-area photonic lift-off process for flexible thin-film transistors


Abstract "Fabricating flexible electronics on plastic is often limited by the poor dimensional stability of polymer substrates. To mitigate, glass carriers are used during fabrication, but removing the plastic substrate from a carrier without damaging the electronics remains challenging. Here we utilize a large-area, high-throughput photonic lift-off (PLO) process to rapidly separate polymer f... » read more

An achromatic X-ray lens


Abstract "Diffractive and refractive optical elements have become an integral part of most high-resolution X-ray microscopes. However, they suffer from inherent chromatic aberration. This has to date restricted their use to narrow-bandwidth radiation, essentially limiting such high-resolution X-ray microscopes to high-brightness synchrotron sources. Similar to visible light optics, one way t... » read more

NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors


Abstract: "The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindra... » read more

Enhanced on-chip phase measurement by inverse weak value amplification


Abstract: "Optical interferometry plays an essential role in precision metrology such as in gravitational wave detection, gyroscopes, and environmental sensing. Weak value amplification enables reaching the shot-noise-limit of sensitivity, which is difficult for most optical sensors, by amplifying the interferometric signal without amplifying certain technical noises. We implement a generali... » read more

Research Bits: March 15


Interferometer on chip Researchers at the University of Rochester developed an optical interferometer on a 2mm by 2mm integrated photonic chip that is capable of amplifying interferometric signals without a corresponding increase in extraneous noise. Interferometers merge two or more sources of light to create interference patterns that provide information able what they illuminate. “If y... » read more

Technical Paper Round-Up: March 15


Research is expanding across a variety of semiconductor-related topics, from security to flexible substrates and chiplets. Unlike in the past, when work was confined to some of the largest universities, that research work is now being spread across a much broader spectrum of schools on a global basic, including joint research involving schools whose names rarely appeared together. Among the ... » read more

Mapping Transformation Enabled High-Performance and Low-Energy Memristor-Based DNNs


Abstract: "When deep neural network (DNN) is extensively utilized for edge AI (Artificial Intelligence), for example, the Internet of things (IoT) and autonomous vehicles, it makes CMOS (Complementary Metal Oxide Semiconductor)-based conventional computers suffer from overly large computing loads. Memristor-based devices are emerging as an option to conduct computing in memory for DNNs to make... » read more

Quantifying Rowhammer Vulnerability for DRAM Security


Abstract: "Rowhammer is a memory-based attack that leverages capacitive-coupling to induce faults in modern dynamic random-access memory (DRAM). Over the last decade, a significant number of Rowhammer attacks have been presented to reveal that it is a severe security issue capable of causing privilege escalations, launching distributed denial-of-service (DDoS) attacks, and even runtime attack ... » read more

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