Research on the Humidity Resistance Reliability of Different Packaging Structures


Abstract "Packaging process is an indispensable part in the process of electronic components manufacturing, and its packaging quality directly affects the nominal power, reliability and other functions of the product in the subsequent application process. Through the research on the humidity resistance reliability of different packaging structures, C-Mount packaging structure, TO packaging str... » read more

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials


Abstract "The main motivation of this review is to study the evolution of first and second level of interconnect materials used in memory device semiconductor packaging. Evolutions of bonding wires from gold (Au) to silver (Ag) or copper (Cu) have been reported and studied in previous literatures for low-cost solution, but Au wire still gives highest rating in terms of the performance of tempe... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has introduced another version of its 4nm process technology. The process, called N4X, is tailored for high-performance computing products. Recently, TSMC introduced another 4nm process, called N4P, which is an enhanced version of its 5nm technology. N4X is also an enhanced version of its 5nm technology. N4X, however, offers a performance boost of up to 15% over TSMC’s N5 pro... » read more

Week In Review: Design, Low Power


Deals Utilidata and Nvidia are teaming up on a software-defined smart grid chip that can be embedded in smart meters to with the aim of improving grid resiliency and integrating distributed energy resources (DERs) such as solar, storage, and electric vehicles. The U.S. Department of Energy’s National Renewable Energy Laboratory (NREL) will test the software-defined smart grid chip as a way t... » read more

Week In Review: Auto, Security, Pervasive Computing


NASA plans to launch the James Webb Space Telescope (JWST) this Saturday, Dec 25, on an European Space Agency (ESA) rocket. Mission-critical radiation-hardened components from IR HiRel, an Infineon company, will go up with the JWST. IR HiRel space-grade DC-DC converters, rad hard MOSFETs and other power control products are in the spacecraft bus subsystems, such as electrical power, altitude co... » read more

Revealing the Effect of Nanoscopic Design on the Charge Carrier Separation Processes in Semiconductor-Metal Nanoparticle Gel Networks


Abstract: "In this paper, it is shown that the nanoscopic design of combining semiconductors and noble metals has a direct impact on the macroscopic (electrochemical) properties of their assembled, hyperbranched, macroscopic gel networks. Controlled and arbitrary deposition of gold domains on CdSe/CdS nanorods leads to tipped and randomly decorated heteroparticles, respectively. Structur... » read more

Reliability Concerns Shift Left Into Chip Design


Demand for lower defect rates and higher yields is increasing, in part because chips are now being used for safety- and mission-critical applications, and in part because it's a way of offsetting rising design and manufacturing costs. What's changed is the new emphasis on solving these problems in the initial design. In the past, defectivity and yield were considered problems for the fab. Re... » read more

The High But Often Unnecessary Cost Of Coherence


Cache coherency, a common technique for improving performance in chips, is becoming less useful as general-purpose processors are supplemented with, and sometimes supplanted by, highly specialized accelerators and other processing elements. While cache coherency won't disappear anytime soon, it is increasingly being viewed as a luxury necessary to preserve a long-standing programming paradig... » read more

The Past Predicting The Future


It is often said that you cannot predict the future by looking at the past, but that isn't always correct. There are many clues provided by digging into change. Those changes are a prelude to what may happen in the future. One way we can do that here at Semiconductor Engineering is by looking at changes in reading habits. What types of articles are attracting the most attention? This is a sure ... » read more

Challenges With Stacking Memory On Logic


Experts at the Table: Semiconductor Engineering sat down to discuss the changes in design tools and methodologies needed for 3D-ICs, with Sooyong Kim, director and product specialist for 3D-IC at Ansys; Kenneth Larsen, product marketing director at Synopsys; Tony Mastroianni, advanced packaging solutions director at Siemens EDA; and Vinay Patwardhan, product management group director at Cadence... » read more

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