Power/Performance Bits: Oct. 12


More stable quantum states Researchers at the University of Chicago found a way to make quantum systems retain coherency 10,000 times longer. The fragile nature of quantum states remains a challenge for developing practical applications of quantum computing, as they can be easily disrupted by background noise coming from vibrations, temperature changes or stray electromagnetic fields. Ap... » read more

I’m Almost Done


The city of Belgrade is renovating the street where I live. They are also building a new building next to mine so that I can see the construction work from my balcony. Last week, they blocked the street for some 20 minutes, and people got out of their cars and waited outside for the road to open. The construction workers were not in a hurry, and it seemed like everyone was ok with that, so I... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs AMD is in talks to acquire Xilinx in a deal that could be worth more than $30 billion, according to a report from The Wall Street Journal. If the deal transpires, AMD will enter the FPGA business, putting it further in competition with Intel. No deal has been struck, though. --------------------------------------------- Multiple sources believe that China’s Huawei i... » read more

Week In Review: Design, Low Power


Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Week In Review: Auto, Security, Pervasive Computing


Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

Protecting Chiplet Architectures With Hardware Security


Chiplets are gaining significant traction as they provide compelling benefits for advancing semiconductor performance, costs, and time to market. With Moore’s Law slowing, building more powerful chips translates into building bigger chips. But with chip dimensions pushing up against reticle limits, growing the size of chips is increasingly impractical. Chiplets offer a new path forward by dis... » read more

Chips Listening To Gibberish


We all talk gibberish once in a while. At least, I do. I might be in a silly mood, thinking aloud, listening to music or talking over the phone using my headphones (they are quite small, and if you don’t notice them, you could think I am crazy). Regardless of the circumstances, I mean no harm, I promise. However, it’s still possible that a passer-by could get distracted trying to figure out... » read more

Secure Silicon Lifecycle Management Architecture For Functional Safety


The rapid growth of electronics for automotive applications fueled by advanced ADAS systems pose new challenges for complex SoC design and Silicon Lifecycle Management (SLM) in the supply chain as well as in-field monitoring and management of the population of chips. In these modern complex devices, ensuring the correct and safe operation requires not only functional safety to check for reli... » read more

AI Design In Korea


Like many in the semiconductor design businesses, Arteris IP is actively working with the Korean chip companies. This shouldn’t be a surprise. If a company is building an SoC of any reasonable size, it needs network-on-chip (NoC) interconnect for optimal QoS (bandwidth and latency regulation and system-level arbitration) and low routing congestion, even in application-centric designs such as ... » read more

One More Time: TOPS Do Not Predict Inference Throughput


Many times you’ll hear vendors talking about how many TOPS their chip has and imply that more TOPS means better inference performance. If you use TOPS to pick your AI inference chip, you will likely not be happy with what you get. Recently, Vivienne Sze, a professor at MIT, gave an excellent talk entitled “How to Evaluate Efficient Deep Neural Network Approaches.” Slides are also av... » read more

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