Optimizing Power And Performance For Machine Learning At The Edge
By Mike Fingeroff - 12 Dec, 2019 - Comments: 0

While machine learning (ML) algorithms are popular for running on enterprise Cloud systems for training neural networks, AI/ML chipsets for edge devices are growing at a triple digit rate, according to Tractica “Deep Learning Chipsets” (Figure 1). Edge devices include automobiles, drones, and mobile devices that are all employing AI/ML to provide valuable functionality. Figure 1: Marke... » read more

System-in-Package For Heterogeneous Designs
By Paul McLellan - 12 Dec, 2019 - Comments: 1

System integration is increasingly being done using 3D packaging technologies rather than integrating everything onto a huge SoC. One motivation is the ability to not just to split up a design in a single process, but to package die from different processes. Sometimes there are economic reasons. Several presentations at HOT CHIPS had a partition of the design into the processor itself, and a... » read more

Verifying Security In Processor-based SoCs
By Ruud Derwig - 12 Dec, 2019 - Comments: 0

By Ruud Derwig and Nicole Fern Security in modern systems is of utmost importance. Device manufacturers are including multiple security features and attack protections into both the hardware and software design. For example, the Synopsys DesignWare ARC Processor IP includes many security functions in its SecureShield feature set. End-product system security, however, cannot be guaranteed by ... » read more

Interdependencies Complicate IC Power Grid Design
By Ann Mutschler - 12 Dec, 2019 - Comments: 0

Creating the right power grid is a growing problem in leading-edge chips. IP and SoC providers are spending a considerable amount of time defining the architecture of logic libraries in order to enable different power grids to satisfy the needs of different market segments. The end of Dennard scaling is one of the reasons for the increased focus. With the move to smaller nodes, the amount of... » read more

Combining Digital Twins And IoT In The Cloud
By Sameer Kher - 12 Dec, 2019 - Comments: 0

Engineers are tasked with the continuous improvement of the products, services and systems they design. The trouble is, once a product is out in the field, it’s hard to know how that design is performing — or being used. By coupling digital twin and internet of things (IoT) technology, engineers can get a better idea of a product’s real-world performance. As a reminder, digital twins a... » read more

A New Dawn For IP
By Brian Bailey - 12 Dec, 2019 - Comments: 0

The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

Defining And Improving AI Performance
By Brian Bailey - 12 Dec, 2019 - Comments: 2

Many companies are developing AI chips, both for training and for inference. Although getting the required functionality is important, many solutions will be judged by their performance characteristics. Performance can be measured in different ways, such as number of inferences per second or per watt. These figures are dependent on a lot of factors, not just the hardware architecture. The optim... » read more

Opening Up An NVM Evaluation Kit
By Denise Rael - 12 Dec, 2019 - Comments: 0

From toys to smartphones and even mail-order reptiles (a practice which we don’t endorse), unboxing videos are an effective and entertaining way to learn more about a product. According to a recent analysis by Shorr Packaging Corp., toys are the most watched unboxing category, followed closely by smartphones and computers. In addition to providing important product details, an unboxing v... » read more

Machine Learning At The Edge
By Mentor, a Siemens Business - 12 Dec, 2019 - Comments: 0

Moving machine learning to the edge has critical requirements on power and performance. Using off-the-shelf solutions is not practical. CPUs are too slow, GPUs/TPUs are expensive and consume too much power, and even generic machine learning accelerators can be overbuilt and are not optimal for power. In this paper, learn about creating new power/memory efficient hardware architectures to meet n... » read more

System Electrothermal Transient Analysis of A High Current (40A) Synchronous Step Down Converter
By Cadence - 11 Dec, 2019 - Comments: 0

Authors: Rajen Murugan, Jie Chen, and Todd Harrison of Texas Instruments, Inc. and C.T. Kao and Nathan Ai of Cadence Design Systems; from Proceedings of the ASME 2019 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, IPACK2019, October 7-9, 2019, Anaheim, CA, USA In this paper, we detailed the system electrothermal transi... » read more

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