category: Blogs – LPHP

category: Auto, Security & Edge AI

7nm Design Success Necessitates A Multi-Physics Approach
By Youngsoo Lee - 12 Jan, 2017 - Comments: 0

Whether you are designing an energy efficient mobile device, or an ADAS platform with stringent reliability requirements, or a high performance enterprise networking system, chips fabricated on advanced technologies such as 7-nanometer (nm) process and 2.5/3D or wafer level packaging can provide several advantages. Designs using these technologies consume less power while delivering higher thro... » read more

Finding Evasive System-Level Bugs Using Memory Consistency Algorithm
By Russell Klein - 12 Jan, 2017 - Comments: 0

Over Easter weekend in 2015 there was a jewelry heist at the safe deposit building at Hatton Gardens in London. The safe deposit vault was in the basement of a building and is used by jewelers in the area for storing large amounts of diamonds, jewelry, precious metals, and cash. The thieves made off with over $300 million in loot, making it the biggest heist in British history. For a while it l... » read more

Multiple Dimensions Of Low-Power Verification With Portable Stimulus
By Tom Anderson - 12 Jan, 2017 - Comments: 0

There is little doubt that designing for low power is one of the biggest challenges for today’s system-on-chip (SoC) devices. The need to minimize power consumption is clear for the vast array of portable electronic devices that we use every day. Consumers expect most of their gadgets to last multiple days before they require recharging, and low-power design is the key to extending battery li... » read more

IoT Will Grow Faster With More Flexible Wireless Design
By Prithi Ramakrishnan - 12 Jan, 2017 - Comments: 0

The fascinating numbers-within-the-numbers for the forecasted growth in Internet of Things (IoT) devices is this: By 2020, it’s estimated there will be nearly 2 billion low-power radio-connected devices, specifically with Bluetooth 5 and 802.15.4 (Zigbee and Thread). Those numbers are compelling because not only is that a quadrupling of the amount of low-power radio devices today, but the val... » read more

Green Computing: GPUs Strike Back
By Barry Pangrle - 19 Dec, 2016 - Comments: 1

After the last Platform for Advanced Scientific Computing Conference in June, I wrote an article here about how the custom designed chips from NRCPC (used in the Sunway TaihuLight) and PEZY Computing (used in the PEZY Shoubu) had jumped to the top of the Green500 list with the Sunway TaihuLight also remarkably topping the Top500 list. Well, six months after the report from the IEEE/ACM SC16 Con... » read more

Dynamic Peak Power As A Proxy For DVD? Really?
By Tobias Bjerregaard - 08 Dec, 2016 - Comments: 0

Dynamic-voltage-drop (DVD) concerns have grown substantially at the 10nm and 7nm silicon process nodes. DVD refers to the transient voltage drop that a local power grid on a chip might experience if there is a rapid change in current. That drop can act like a “stall,” hurting performance until the grid recovers. Beefing up the power grid metal might seem to be the obvious fix, but, at th... » read more

Five Pitfalls In PCIe-Based NVMe Controller Verification
By Saurabh Sharma - 08 Dec, 2016 - Comments: 1

Non-Volatile Memory Express (NVMe) is gaining rapidly in mindshare among consumers and vendors. Some industry analysts are forecasting that PCIe-based NVMe will become the dominant storage interface over the next few years. With its high-performance and low-latency characteristics, and its availability for virtually all platforms, NVMe is a game changer. For the first time, storage devices and ... » read more

What Comes After Moore’s Law And Dennard Scaling?
By Steven Woo - 08 Dec, 2016 - Comments: 0

For decades, Moore’s Law has been an important semiconductor industry mainstay that has helped fuel a relentless progression in computing performance. However, most industry experts agree that Moore’s Law is waning, with an end on the horizon due to a combination of physical limitations and economic factors. With the loss of Dennard Scaling roughly 10 years ago, the industry is at a critica... » read more

Design Convergence For 7nm Chips Needs Big Data-Driven Multi-Physics Optimization
By Scott Johnson - 08 Dec, 2016 - Comments: 0

Advancements in silicon process technologies are enabling companies to deliver products with faster performance, lower power and greater functionality. These benefits are especially attractive for chip manufacturers servicing markets such as high-end mobile and enterprise computing. However, the cost in terms of both dollars and resources associated with bringing 7-nanometer (nm) finFET-based s... » read more

Verification Of Low-Power Designs With Portable Stimulus
By Tom Anderson - 08 Dec, 2016 - Comments: 0

In a recent blog post, Steve Carlson talked about the use of software-driven tests to support concurrent power and performance analysis. Generation of software-driven tests is one of the key technologies that will be enabled by the upcoming standard from Accellera's Portable Stimulus Working Group (PSWG). Portable stimulus spans functional verification as well as performance validation, so PSWG... » read more

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