LLM Technology For Chip Design


In the nine short months since OpenAI brought ChatGPT (a Chat Generative Pre-Trained Transformer) and the phenomenal concept of large language models (LLMs) to the global collective consciousness, pioneers from every corner of the economy have raced to understand the benefits—and the pitfalls—of deploying this nascent technology to their particular industry. And as it turns out, semicondu... » read more

Managing P/P Tradeoffs With Voltage Droop Gets Trickier


Experts at the Table: Semiconductor Engineering sat down to talk about voltage droop/IR drop with Bill Mullen, distinguished engineer at Ansys; Rajat Chaudhry, product management group director at Cadence; Heidi Barnes, senior applications engineer at Keysight Technologies; Venkatesh Santhanagopalan, product manager at Movellus; Joe Davis, senior director for Calibre interfaces and mPower EM/IR... » read more

Nginx Performance On AWS Graviton3


In this blog we explore the performance of a Nginx Reverse Proxy (RP) and API Gateway (APIGW) on AWS Graviton3-based instances. We will also refer to these collectively as RP/APIGW. We compared AWS Graviton3-based instances to Intel Xeon 'Ice Lake'-based instances and AWS Graviton2-based instances to demonstrate the leadership performance available with AWS Graviton3. Summary Compared to AWS ... » read more

Electro-Thermal Design Breakthrough


Electronic component manufacturers have traditionally provided models in SPICE format, so customers can simulate their application circuits and better understand the features, capabilities, and interactions of those parts in the system context. Now, with BCI ROM, a similar and parallel thermal model supply chain can develop. This technology breakthrough arrives at a time of component design-in ... » read more

Understanding UVM Coverage For RISC-V Processor Designs


Attempting to achieve complete RISC-V verification requires multiple methodologies employing a wide range of relevant tools, including: • Coverage driven simulation based on UVM constrained random methods and compliant with the Universal Verification Methodology (UVM) standard • Static and formal property verification • Equivalence checking • Emulation and FPGA based verific... » read more

The Ansys Charge Plus PiC Solve


All surfaces are exposed to radiation, whether aircraft fuselages, satellite skins, or solar panels, are subjected to ionization effects through the accumulation of charged plasmas. Such plasmas present critical hazards to these platforms as their sudden nonlinear discharges can damage or destroy surfaces and underlying electronic components. Through the Particle-in-Cell solver, Ansys Charge Pl... » read more

Arm Total Compute: Engineering For Tomorrow’s Workload


As consumers seek richer and more immersive experiences from their devices, the way compute systems are engineered must continually evolve to keep up. Arm Total Compute takes a solution-focused approach to system-on-chip design, moving beyond individual IP elements to design and optimize the system as a whole to enable more digital immersion experiences. Not only does this white paper dis... » read more

Startup Funding: August 2023


August startup funding continued to follow the trends that put AI and autonomous driving at the top of funding. One of August's largest rounds went to a company designing AI processor IP that can scale from the edge to the cloud. Plus, three battery manufacturers brought in one billion dollars or more. This report covers 37 companies that collectively raised $4.2 billion in August 2023. [... » read more

Research Bits: September 11


Combining digital and analog Researchers from École Polytechnique Fédérale de Lausanne (EPFL) propose integrating 2D semiconductors with ferroelectric materials for joint digital and analog information processing, which could improve energy efficiency and support new functionality. The device uses a 2D negative-capacitance tungsten diselenide/tin diselenide tunnel FET (TFET), which consu... » read more

Sweeping Changes For Leading-Edge Chip Architectures


Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

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