Ultra-Small Fan-Out Packaging Solution

By Ken Hsiao - 19 Aug, 2021 - Comments: 0

With the advent of the Internet and multimedia, electronics miniaturization in the form of integrated circuits has become an indispensable part of our lives. To ensure its long-term operation and reliability, the rapid development of integrated circuits depends on advancements in not only the design and manufacturing of chips, but also its packaging. As the market demand for consumer and com... » read more

Stacked Nanosheets And Forksheet FETs

By Katherine Derbyshire - 19 Aug, 2021 - Comments: 0

What comes next after gate-all-around FETs is still being worked out, but it likely will involve some version of stacked nanosheets. The design of advanced transistors is a tradeoff. On one hand, it takes less gate capacitance to control a thin channel. On the other hand, thin channels can’t carry as much drive current. Stacked nanosheet designs seek to reconcile these two objectives by... » read more

Current And Future Packaging Trends

By Mark LaPedus - 19 Aug, 2021 - Comments: 1

Semiconductor Engineering sat down to discuss IC packaging technology trends and other topics with William Chen, a fellow at ASE; Michael Kelly, vice president of advanced packaging development and integration at Amkor; Richard Otte, president and CEO of Promex, the parent company of QP Technologies; Michael Liu, senior director of global technical marketing at JCET; and Thomas Uhrmann, directo... » read more

Specialty Technologies Bring New Functionality

By David Haynes - 19 Aug, 2021 - Comments: 0

As a materials engineer, I am very proud of the fact that key advances in human civilization have been driven by materials innovation. The stone age, bronze age, and iron age were all essential steps in setting the human race on the path that we are on today. Innovations are not without their downsides, but they have enabled progress in agriculture, medicine, transportation, communication, a... » read more

Empowering RF Front End Cellular Innovations With DSMBGA

By Curtis Zwenger - 19 Aug, 2021 - Comments: 0

With the introduction of 5G, cellular frequency bands have increased considerably, requiring innovative solutions for the packaging of RF front-end modules for smartphones and other 5G-enabled devices. Double-sided, molded ball grid array (DSMBGA) is a prime example of such solutions. “With our DSMBGA platform, we’ve established a preferred advanced packaging solution for this domain,”... » read more

Micron B47R 3D CTF CuA NAND Die, World’s First 176L (195T)

By Jeongdong Choe - 19 Aug, 2021 - Comments: 0

Micron’s 176L 3D NAND is the world’s first 176L 3D NAND Flash memory. TechInsights just found the 512Gb 176L die (B47R die markings) and quickly viewed its process, structure, and die design. Micron 176L 3D NAND is one of the most groundbreaking technologies to date, and it is especially for the storage application such as data center, 5G, AI, cloud, intelligent edge, and mobile devices. Mi... » read more

Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach

By Brewer Science - 19 Aug, 2021 - Comments: 0

One of the main challenges of a Dual Damascene (DD) via-first process is the control of the Critical Dimensions (CDs) in the lithography of the trenches. The PhotoResist (PhR) thickness presents variations from the via arrays to the open areas, which cause the variation of CDs: the swing effect. The planarization of a DD via-first process is reported. A dual-layer solution is used to demonst... » read more

Wafer-Level Fan-Out For High-Performance, Low-Cost Packaging Of Monolithic RF MEMS/CMOS

By Amkor - 18 Aug, 2021 - Comments: 0

Navigating the trade-offs between performance, size, cost and reliability can be a challenge when considering integrated circuit (IC) packaging and the end-application. The integration of micro-electromechanical systems (MEMS), either monolithic or heterogeneous, introduces yet another level of complexity that has only recently been a major focus of multi-device packaging [1]. Wafer-level fanou... » read more

Process Variation Analysis Of Device Performance Using Virtual Fabrication — Methodology Demonstrated On A CMOS 14-nm FinFET Vehicle

By Coventor - 18 Aug, 2021 - Comments: 0

A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. The model was subsequently calibrated on Design of Experiment corner case data that had been collected on a limited number of processed fab wafers. W... » read more

Manufacturing Bits: Aug. 17

By Mark LaPedus - 17 Aug, 2021 - Comments: 0

Scaling qubits Australia is a hotbed of R&D activity, especially in the field of quantum computing. For example, the University of New South Wales (UNSW) in Australia has demonstrated a possible way to control millions of qubits in a silicon quantum chip. Researchers from UNSW Sydney have devised a new three-dimensional dielectric resonator, a technology that could deliver controlled... » read more

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