category: System-Level Design

category: IoT, Security & Automotive

Enabling Big Chip AI Solutions Through Intelligent Clock Networks
By Aakash Jani - 26 May, 2022 - Comments: 0

Data centers, autonomous vehicles, and computer vision applications are pushing the limits of scalable AI compute. Data center chips face multi-trillion parameter models that continue growing every year. ADAS systems require flexibility and processing power for new model types, such as vision transformers. Edge AI solutions demand tight power budgets and the ability to process multiple models i... » read more

Will Big Competition Attract More Talent For IC Companies?
By Marie C. Baca - 26 May, 2022 - Comments: 1

Google is hiring a chip packaging technologist. General Motors is seeking a wafer fabrication procurement specialist. Facebook Reality Labs wants a materials researcher with experience in photolithography and nanoimprint techniques. Recent job postings by tech and automotive giants are enough to worry any chip company executive struggling to attract talent. But what may seem at first like a ... » read more

The Evolving Digital Journey Of The Electronics Value Chain
By Matt Walsh - 26 May, 2022 - Comments: 0

Digitally transforming how the electronics value chain is traversed will unlock the full innovative potential of system design companies all over the world. By augmenting desktop authoring tools with integrated, native cloud applications that seamlessly connect companies with the electronics value chain, design teams will be empowered to confidently deliver on aggressive requirements, schedules... » read more

Repositioning For A Changing IC Market
By Ed Sperling - 26 May, 2022 - Comments: 0

Sailesh Chittipeddi, executive vice president at Renesas, sat down with Semiconductor Engineering to talk about how changes in end markets are shifting demand for technology. What follows are excerpts of that conversation. SE: Renesas has acquired a number of companies over the past several years. What's the goal? Chittipeddi: The goal very simply is to create an industry leading solutio... » read more

Next-Generation Distributed Static Timing Analysis On The Cloud
By Ajit Sequeira - 26 May, 2022 - Comments: 0

Ever-growing chip size and complexity put pressure on every step and every electronic design automation (EDA) tool in the development flow. More decisions must be made at the architectural stage, stressing virtual prototypes and high-level models. Simulations become slower and consume more memory. Formal verification struggles to achieve full proofs. Logic synthesis and layout have a harder tim... » read more

Differentiation And Architecture Licenses In RISC‑V
By Rupert Baines - 26 May, 2022 - Comments: 0

I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP model, there is a clear distinction between an off-the-shelf IP license that gives some level of configuration but no customization and a fairly expensive architecture license enabling ... » read more

True Wireless Stereo Earbud Charger Cradle
By Michael Joehren - 26 May, 2022 - Comments: 0

During the last few years, Bluetooth-connected earbuds and headphones have gained significant market share over their wired ancestors. Especially, True Wireless Stereo (TWS) earbuds gained massive popularity with approximately 300M+ units sold in 2021. Technically, these earbuds resemble in-ear hearing aids, except that they offer advanced features such as wireless connectivity (Bluetooth) and ... » read more

High-Level Synthesis: It’s Still Hardware Design
By Siemens EDA - 26 May, 2022 - Comments: 0

Hardware design using HLS is no different than the typical ASIC/FPGA design flow with the exception that C++/SystemC is being used along with HLS to create the RTL instead of hand coding it. The advantage of using HLS is that it speeds up RTL creation time and reduces verification time by producing bug free RTL quickly from a fully verified C++/SystemC source. The misconception that still exist... » read more

Zone-ECU Virtualization Solution Platform
By Renesas - 25 May, 2022 - Comments: 0

The high complexity of future vehicle systems will need to move away from today’s distributed automotive E/E architecture towards a more centralized E/E structure based on less but much more powerful ECUs, instead of many individual control entities. A Zone-oriented architecture moves the integration of numerous functions and services into one ECU. The resulting network concept must deal w... » read more

Designing Application-Specific Processors for Wireless 5G SoCs
By Synopsys - 25 May, 2022 - Comments: 0

Traditional architectures for wireless baseband applications are no longer adequate for recent and next-generation modem standards. Supporting complex and still evolving standards like 5G in a single modem is only possible by using SDR techniques, which place increasing demands on performance and power consumption on the SoC. ASIP architectures enable full customization of a processor, which... » read more

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