category: System-Level Design

category: Auto, Security & Edge AI

PCIe 6.0 Electrical Testing For High Data-Bandwidth Applications
By Cadence - 22 Mar, 2023 - Comments: 0

For nearly three decades, PCI Express (PCIe) technology has been the standard interconnect inside computers providing high bandwidth and low latency to meet customer demand. However, as the industry needs to evolve, so does the standard, keeping pace and driving future innovation. PCIe 6.0 is ubiquitous and offers power-efficient performance and high bandwidth for latency-sensitive applicati... » read more

Using Simulation To Overcome Three Millimeter-Wave Design Challenges
By Keysight - 22 Mar, 2023 - Comments: 0

Radio designers are embracing system simulation to reduce design time and ensure their devices meet the 5G NR specification. We explore 3 simulation techniques to overcome mmWave design challenges. Click here to read more. » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Mar, 2023 - Comments: 0

The UK government published its National Quantum Strategy, which outlines the plan to invest £2.5 billion (~$3.0 billion) over the next 10 years into quantum technology, including computing, sensing, timing, imaging, and networking. "We will develop UK strengths across different hardware platforms, software, and components, and reinforce our capabilities throughout the supply chains. Although ... » read more

Blog Review: March 15
By Jesse Allen - 15 Mar, 2023 - Comments: 0

Siemens EDA's Dan Yu finds that high-quality, well-connected mass data are crucial to the success of applying machine learning to verification and recommends teams pivot to a data-centric workflow. Synopsys' Shankar Krishnamoorthy suggests that deploying AI-driven chip design and verification can free teams from iterative work, letting them focus instead on product differentiation and PPA en... » read more

Blog Review: March 8
By Jesse Allen - 08 Mar, 2023 - Comments: 0

Synopsys' Rahul Thukral and Bhavana Chaurasia find that embedded MRAM is undergoing an uplift in utilization for low-power, advanced-node SoCs thanks to its high capacity, high density, and ability to scale to lower geometries. Siemens EDA's Chris Spear dives into the UVM Factory with a look at the  SystemVerilog Object-Oriented Programming concepts behind the factory. Cadence's Veena Pa... » read more

Startup Funding: February 2023
By Jesse Allen - 08 Mar, 2023 - Comments: 0

The cost of borrowing is going up, but investors continued to pour money into the chip industry in February. Collectively, 132 companies raised more than $4.5 billion last month. One of the big beneficiaries was quantum computing, with nine companies drawing a total of more than $500 million. The bulk of that went to a quantum software and services company spun out of Alphabet, but plenty wa... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 Mar, 2023 - Comments: 0

Apple plans to spend an additional €1 billion (~$1.1B) over the next six years to expand its Munich, Germany-based Silicon Design Centre, including the construction of a new research facility. "The expansion of our European Silicon Design Centre will enable an even closer collaboration between our more than 2,000 engineers in Bavaria working on breakthrough innovations, including custom sil... » read more

Blog Review: March 1
By Jesse Allen - 01 Mar, 2023 - Comments: 0

Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

How To Build Resilience Into Chips
By Ed Sperling and Ann Mutschler - 27 Feb, 2023 - Comments: 0

Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for continued improvements in performance and power, but it's also contributing to unusual and often unpredictable errors in hardware that are extremely difficult to find. The sources of those errors can include anything from timing errors in a particular sequence, to gaps in bonds between chi... » read more

Keysight Acquires Cliosoft
By Ed Sperling - 23 Feb, 2023 - Comments: 0

Keysight announced today that it has acquired Cliosoft, adding IP data management and design data to its EDA portfolio. The deal comes at a time when chip designs are becoming more heterogeneous and customized, making it more difficult to keep track of a growing number of IP assets. What works for one market or sub-market may not be optimal for another. That could include everything from di... » read more

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