category: System-Level Design

category: Auto, Security & Edge AI

The Impact Of ML On Chip Design
By Ed Sperling - 22 May, 2023 - Comments: 0

Node scaling and rising complexity are increasing the time it takes to get chips out the door. At the same time, design teams are not getting larger. What is needed is a way to automate the creative process, and to not have to start every design from scratch. This is where reinforcement learning fits in, with its ability to centralize and store “tribal knowledge. Thomas Andersen, vice preside... » read more

Blog Review: May 17
By Jesse Allen - 17 May, 2023 - Comments: 0

Synopsys' Dana Neustadter examines the key industries driving Ethernet security, challenges to securing Ethernet networks, and the MACsec protocol that guards against network data breaches by encrypting data traffic between Ethernet-connected devices. Siemens' Stephen Chavez points to the improvements gained from design reuse in PCB design but warns that inefficient processes for managing an... » read more

Week In Review: Design, Low Power
By Jesse Allen - 12 May, 2023 - Comments: 1

Synopsys acquired Silicon Frontline Technology, a provider of an electrical layout verification solution for mixed-signal and analog designs, large-scale power semiconductor devices, and electrostatic discharge protection networks. "This acquisition enables Synopsys to extend the capabilities of our design analysis portfolio and help build out a system-level electrical analysis platform. We als... » read more

Blog Review: May 10
By Jesse Allen - 10 May, 2023 - Comments: 0

Synopsys' Alessandra Nardi and Uyen Tran explain how to meet quality, reliability, functional safety, and security requirements of automotive chips through thorough test programs, path-margin monitoring, and design failure mode and effect analysis (DFMEA). Cadence's Veena Parthan explores how computational fluid dynamics can help predict and model the generation, propagation, and mitigation ... » read more

Challenges In Writing SDC Constraints
By Ed Sperling - 08 May, 2023 - Comments: 0

Writing design constraints is becoming more difficult as chips become more heterogeneous, and as they are expected to function longer in the field. Timing and power can change over time, and constraints need to be adjusted to that changing context. Synopsys’ Ajay Daga, group director for R&D at Synopsys, talks about the challenges in pushing constraints down to different hierarchical portions... » read more

Week In Review: Design, Low Power
By Jesse Allen - 05 May, 2023 - Comments: 0

Arm advanced its progress toward an initial public offering, confidentially submitting a draft registration statement on Form F-1 to the U.S. Securities and Exchange Commission. The size and price range for the proposed offering have yet to be determined. Graphene IDM Paragraf acquired Cardea Bio, a maker of graphene-based biocompatible chips. Cardea has developed a biosignal processing unit... » read more

Blog Review: May 3
By Jesse Allen - 03 May, 2023 - Comments: 0

Synopsys' Thomas Andersen considers the requirements of AI-optimized chips that are resulting in exploration of different memory configurations, different types of memory, and different types of processor technologies and software components. Cadence's Girish Vaidyanathan considers the role of hierarchy and partitioning in custom design and looks at how a virtual hierarchy allows layout desi... » read more

Startup Funding: April 2023
By Jesse Allen - 03 May, 2023 - Comments: 0

Packaging was a hot spot in April, with one of the largest rounds going to a middle-end-of-line advanced packaging company. A second packaging company also drew significant funding for its focus on wafer-level packaging for CMOS image sensors. Two packaging substrate manufacturers also saw investment. Two photoresist makers also drew sizeable rounds. Both they and the packaging companies are... » read more

TSMC Targets N2 Production For 2025
By Barry Pangrle - 02 May, 2023 - Comments: 0

April ended with TSMC’s financial results for the 1st Quarter of 2023 reported on April 20, 2023, and their North American Technology Symposium was held on April 27 at the Santa Clara Convention Center. TSMC’s N3 entered volume production in 4Q 2022 and TSMC’s N2 “nanosheet” technology is on schedule for production in 2025. TSMC’s CEO, C.C. Wei, said during the 1Q conference cal... » read more

EDA Posts Q4 2022 Revenue of $3.9B
By Ann Mutschler - 01 May, 2023 - Comments: 0

The ESD Alliance, a SEMI Technology Community, announced today in its latest Electronic Design Market Data (EDMD) report that the Electronic System Design (ESD) industry revenue increased 11.3% from $3.47 billion in the fourth quarter of 2021 to $3.86 billion in the fourth quarter of 2022. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 12.6... » read more

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