Reducing IR And EM Issues With Automated Via Insertion


IR drop and EM issues are significant performance and reliability detractors at advanced nodes. Adding vias is the most effective means of correction, but traditional custom scripts are difficult and time-consuming, and do not guarantee correct-by-construction vias. The Calibre YieldEnhancer PowerVia utility uses manufacturing requirements to perform automated insertion of DRC/LVS-clean vias. R... » read more

The Big Data Revolution Beautiful Servant Or Dangerous Monster?


The world is experiencing the revolution of information, humanity shifting the hegemony from science onto data. Just as the printing revolution once flooded the world with information, now cybernetic space is engulfing the entire planet with enormous amounts of information particles. We are living in an era where knowledgeability, facts, and big data have completely taken over, and control us a... » read more

Constraint-Based Verification Of Clock Domain Crossings


There are many measures of the ever-growing size and complexity of semiconductor devices: die area, transistor count, gate count, size of memories, amount of parallel processing and more. All these factors mean more time spent in design, but they also have a major impact on verification. Since virtually all industry studies show verification time and effort growing faster than design, this impa... » read more

Intelligent System Design


Electronics technology is proliferating to new, creative applications and appearing in our everyday lives. To compete, system companies are increasingly designing their own semiconductor chips, and semiconductor companies are delivering software stacks, to enable substantial differentiation of their products. This trend started in mobile devices and is now moving into cloud computing, automotiv... » read more

Effective Post-TSV-DRIE Wet Clean Process For Through Silicon Via Applications


Deep Reactive Ion Etch (DRIE) processes used to form through silicon vias (TSVs) achieve high aspect ratios by depositing polymer on the vertical sidewalls of the features. This polymer material must be removed before other materials (including dielectric liner, Cu barrier, and Cu) are deposited in the TSVs. Clean processes adapted from Cu damascene integration flows use a combination of oxygen... » read more

Defect Evolution In Next Generation, Extreme Ultraviolet Lithography


Extreme ultraviolet (EUV) lithography is a promising next generation lithography technology that may succeed optical lithography at future technology nodes. EUV mask infrastructure and manufacturing of defect-free EUV mask blanks is a key near term challenge in the use of EUV lithography. Virtual fabrication is a computerized technique to perform predictive, three dimensional modeling of sem... » read more

Fast-Charging Technology: The Key To Speeding Electric Vehicle Adoption


As the EV market continues to grow and expand, the demand for fast chargers will continue to soar, and the space, efficiency, and system cost gains provided by SiC in various applications will become an increasingly important advantage. Click here to read more. » read more

Thin Film Characterization For Advanced Patterning


Authors: Zhimin Zhu; Xianggui Ye; Sean Simmons; Catherine Frank; Tim Limmer; James Lamb Brewer Science, Inc. (United States) A variable-angle spectroscopic ellipsometer (VASE) is an essential tool for measuring the thickness of a thin film, as well as its n and k optical parameters. However, for films thinner than 10 nm, precise measurement is very challenging. In this paper, the root cause... » read more

Machine Learning At The Edge


Moving machine learning to the edge has critical requirements on power and performance. Using off-the-shelf solutions is not practical. CPUs are too slow, GPUs/TPUs are expensive and consume too much power, and even generic machine learning accelerators can be overbuilt and are not optimal for power. In this paper, learn about creating new power/memory efficient hardware architectures to meet n... » read more

A Sneak Peek Into SVE And VLA Programming


Download this white paper to get an overview of SVE, get information on the new registers and the new instructions, and learn about the Vector Length Agnostic (VLA) programming technique, including some examples. The Scalable Vector Extension (SVE) is an extension of the ARMv8-A A64 instruction set, recently announced by ARM. Following the announcement at Hot Chips 28, a few articles describ... » read more

← Older posts