In-field, In-Mission Reliability Monitoring Based On Deep Data


This paper describes a Deep Data approach to reliability monitoring in advanced electronics, based on degradation as a precursor for failure. By applying machine learning algorithms and analytics to data created by on-chip monitoring IPs (Agents), IC/system health and performance can be continuously monitored, at all stages of the product lifecycle. Realtime degradation analysis of critical par... » read more

Fab Fingerprint For Proactive Yield Management


The following paper presents a case study describing how to improve yield and fab productivity by implementing a frequent pattern database that utilizes artificial intelligence-based spatial pattern recognition (SPR) and wafer process history. This is important because associating spatial yield issues with process and tools is often performed as a reactive analysis, resulting in increased wafer... » read more

The Next Generation of Testbench Debug Productivity


It is widely accepted that verification consumes at least sixty percent of time and resources on most semiconductor development projects. This statistic has been borne out by many industry surveys over the last twenty years. Verification technology has had to evolve to accommodate ever larger and more complex designs. Innovations such as constrained-random simulation and the Universal Verificat... » read more

Orchestrating An Efficient ISO 26262 Fault Campaign


The primary objective of a fault campaign is to understand whether the safety architecture sufficiently prevents random failures from violating ISO 26262 safety requirements for both commercial and passenger automobiles. To complete fault injection, faults are injected and propagated in the design to validate the functional correctness of the safety mechanisms and to classify each fault. Fault ... » read more

Security Solutions for AI/ML


AI/ML is increasingly pervasive across all industries driven by a massive wave of digitization. Data, the raw material of AI/ML and Deep Learning algorithms, is available in enormous quantities from all aspects of business operations. AI/ML promises great gains in responsiveness and adaptability in an ever-changing technology landscape, and industries are enthusiastically responding to that app... » read more

Achieving Embedded Design Simplicity With Kria SOMs


Xilinx Kria System-on-Modules (SOMs) provide a secure and production-ready multicore Arm processing and FPGA platform, including memories, power management, and your choice of a Yocto or Ubuntu Linux infrastructure to build accelerated AI-enabled applications at the edge. Kria accelerated apps offer an industry-first shortcut that enable both new and experienced Xilinx designers to skip doing a... » read more

When It Makes Sense To Perform An Open Source Audit


Today's software is not created so much as assembled. The parts that serve as ingredients come from a variety of sources, but mostly from the millions of open source components freely available on the internet. This has enabled a digital transformation in several industries, helping market leaders speed their time to market, lower costs, and improve innovation. But what are the licensing and... » read more

MaxLinear And Calibre RealTime Digital


MaxLinear implemented the Calibre RealTime Digital interface for fast, iterative, signoff DRC checking and fixing during floorplanning and placement. They not only reduce the total of batch DRC iterations, but also eliminate potential late-stage issues during final physical verification signoff that are exponentially harder to fix. Adopting the Calibre RealTime Digital interface enabled MaxLine... » read more

Virtuoso ADE Assembler


Cadence Virtuoso ADE Assembler is an advanced design and simulation environment that extends the capabilities of Virtuoso ADE Explorer, adding all the tests needed to fully verify a design over all operational, process, and environmental conditions. As more analysis is required, users can take incremental advantage of the Virtuoso Variation Option to do more advanced statistical analysis on the... » read more

Hardware-Software Co-verification (ARM CPU)


In every complex SoC verification process, it is necessary to activate the CPUs during verification and to check the operation of the software they execute alongside the test’s scenarios. At a minimum, basic scenarios such as “boot rom execution” are tested, but in many cases, further scenarios are required. The CPUs themselves are usually proven IPs, but in order to verify their integrat... » read more

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