Chip Industry Technical Paper Roundup: Oct. 14

High NA-EUV resolution; HKMG DRAM reliability; rethinking programmed I/O; survey on HW-SW LLMs; confidentiality of cryptographic keys; spin orbit torque phenomena in GdCo; flexible electronic-photonic 3D integration.

popularity

New technical papers recently added to Semiconductor Engineering’s library:

Technical Paper Research Organizations
Resolution enhancement for high-numerical aperture extreme ultraviolet lithography by split pupil exposures: a modeling perspective Fraunhofer IISB and ASML
Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM Sungkyunkwan University and Samsung Electronics
Flexible electronic-photonic 3D integration from ultrathin polymer chiplets Dartmouth College and Boston University
Rethinking Programmed I/O for Fast Devices, Cheap Cores, and Coherent Interconnects ETH Zurich
A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models Duke University and Johns Hopkins University
Tunable multistate field-free switching and ratchet effect by spin-orbit torque in canted ferrimagnetic alloy UC Berkeley and Lawrence Berkeley National Laboratory
KeyVisor — A Lightweight ISA Extension for Protected Key Handles with CPU-enforced Usage Policies CISPA Helmholtz Center for Information Security and Ruhr University Bochum

More Reading
Chip Industry Week In Review
AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more.

Technical Paper Library home



Leave a Reply


(Note: This name will be displayed publicly)