Looking Forward To SPIE, And Beyond

On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not resolution, but control: CD control, line-width roughness, line-edge roughness, CD uniformity, and overlay.

Meanwhile, the poor efficiency of EUV light production contributes to the industry’s already significant energy requirements. Chip making uses as much as 10% of Taiwan’s total electricity supply.  The Roadmap estimates that fab energy requirements increase about 60% from the N7 logic node to the N3 logic node. Though EUV processes have fewer steps, no energy is saved.

Models for NAND flash channel etching
The vertical channel in 3D NAND flash structures is produced by etching a thick stack of alternating silicon nitride and silicon dioxide layers, then selectively growing epitaxial silicon from the bottom of the trench. Each increase in storage density brings additional layers and a higher aspect ratio. A group at TU Wien, in Vienna, proposed a new model for the etching and selective growth processes. They found that high energy ions can damage the underlying silicon and lead to poor coverage during the epitaxial growth step. A low-energy plasma treatment can remove the damaged layer and facilitate highly crystalline silicon growth.

Transferring graphene
Apropos of my article on two-dimensional semiconductors, researchers at Infineon Technologies AG, RWTH Aachen University, Protemics, and Advantest evaluated alternative transfer methods and demonstrated a tool to transfer graphene from copper foil to silicon wafers without using adhesive polymers. They expect “semidry” transfer methods using a carrier wafer to be more scalable, as the carrier wafer simplifies handling and automation. They believe their conclusions are applicable to other 2D semiconductors, as well.

Organic semiconductors, brick by brick
The complexity of carbon chemistry gives scientists studying organic semiconductors a vast array of potential options. One promising approach involves using π-electronic systems (systems in which the electrons occupy the p-orbitals of the atoms) to create stacked assemblies. Stacks of identically charged species have interesting semiconductor properties, but are challenging to construct because of electrostatic repulsion. Researchers at Ritsumeikan University, Japan examined how counteranions can help tune the structure and properties of these assemblies.